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-rw-r--r--src/arch/arm/isa/insts/ldr.isa4
-rw-r--r--src/arch/arm/isa/insts/macromem.isa2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/arm/isa/insts/ldr.isa b/src/arch/arm/isa/insts/ldr.isa
index 86cb76383..b058ba73c 100644
--- a/src/arch/arm/isa/insts/ldr.isa
+++ b/src/arch/arm/isa/insts/ldr.isa
@@ -90,7 +90,7 @@ let {{
eaCode += offset
eaCode += ";"
- accCode = "Dest = Mem%s;\n" % buildMemSuffix(sign, size)
+ accCode = "IWDest = Mem%s;\n" % buildMemSuffix(sign, size)
if writeback:
accCode += "Base = Base %s;\n" % offset
base = buildMemBase("MemoryImm", post, writeback)
@@ -115,7 +115,7 @@ let {{
eaCode += offset
eaCode += ";"
- accCode = "Dest = Mem%s;\n" % buildMemSuffix(sign, size)
+ accCode = "IWDest = Mem%s;\n" % buildMemSuffix(sign, size)
if writeback:
accCode += "Base = Base %s;\n" % offset
base = buildMemBase("MemoryReg", post, writeback)
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa
index 3a080625f..474e4fab0 100644
--- a/src/arch/arm/isa/insts/macromem.isa
+++ b/src/arch/arm/isa/insts/macromem.isa
@@ -66,11 +66,11 @@ let {{
['IsMicroop'])
microLdrRetUopCode = '''
- Ra = Mem;
uint32_t newCpsr =
cpsrWriteByInstr(Cpsr | CondCodes, Spsr, 0xF, true);
Cpsr = ~CondCodesMask & newCpsr;
CondCodes = CondCodesMask & newCpsr;
+ IWNPC = Mem | ((Spsr & 0x20) ? 1 : 0);
'''
microLdrRetUopIop = InstObjParams('ldr_ret_uop', 'MicroLdrRetUop',
'MicroMemOp',