diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/inorder/inorder_dyn_inst.cc | 4 | ||||
| -rw-r--r-- | src/cpu/inorder/inorder_dyn_inst.hh | 10 | ||||
| -rw-r--r-- | src/cpu/inorder/resources/use_def.cc | 7 |
3 files changed, 13 insertions, 8 deletions
diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc index 7fbab4c7d..a90c2cdb4 100644 --- a/src/cpu/inorder/inorder_dyn_inst.cc +++ b/src/cpu/inorder/inorder_dyn_inst.cc @@ -500,8 +500,8 @@ InOrderDynInst::setIntRegOperand(const StaticInst *si, int idx, IntReg val) void InOrderDynInst::setFloatRegOperand(const StaticInst *si, int idx, FloatReg val) { - instResult[idx].res.fpVal.f = val; instResult[idx].type = Float; + instResult[idx].res.fpVal.f = val; instResult[idx].tick = curTick(); DPRINTF(InOrderDynInst, "[tid:%i]: [sn:%i] Result Float Reg. %i " @@ -514,7 +514,7 @@ void InOrderDynInst::setFloatRegOperandBits(const StaticInst *si, int idx, FloatRegBits val) { - instResult[idx].type = Integer; + instResult[idx].type = FloatBits; instResult[idx].res.fpVal.i = val; instResult[idx].tick = curTick(); diff --git a/src/cpu/inorder/inorder_dyn_inst.hh b/src/cpu/inorder/inorder_dyn_inst.hh index 54c2e16c5..b655de380 100644 --- a/src/cpu/inorder/inorder_dyn_inst.hh +++ b/src/cpu/inorder/inorder_dyn_inst.hh @@ -213,6 +213,7 @@ class InOrderDynInst : public FastAlloc, public RefCounted None, Integer, Float, + FloatBits, Double }; @@ -889,7 +890,7 @@ class InOrderDynInst : public FastAlloc, public RefCounted return instResult[idx].type; } - uint64_t readIntResult(int idx) + IntReg readIntResult(int idx) { return instResult[idx].res.intVal; } @@ -899,9 +900,14 @@ class InOrderDynInst : public FastAlloc, public RefCounted return instResult[idx].res.fpVal.f; } + FloatRegBits readFloatBitsResult(int idx) + { + return instResult[idx].res.fpVal.i; + } + Tick readResultTime(int idx) { return instResult[idx].tick; } - uint64_t* getIntResultPtr(int idx) { return &instResult[idx].res.intVal; } + IntReg* getIntResultPtr(int idx) { return &instResult[idx].res.intVal; } /** This is the interface that an instruction will use to write * it's destination register. diff --git a/src/cpu/inorder/resources/use_def.cc b/src/cpu/inorder/resources/use_def.cc index f7376c83c..9d0100565 100644 --- a/src/cpu/inorder/resources/use_def.cc +++ b/src/cpu/inorder/resources/use_def.cc @@ -404,18 +404,18 @@ UseDefUnit::execute(int slot_idx) regDepMap[tid]->removeFront(reg_type, flat_idx, inst); if (inst->resultType(ud_idx) == - InOrderDynInst::Integer) { + InOrderDynInst::FloatBits) { DPRINTF(InOrderUseDef, "[tid:%i]: [sn:%i]: Writing FP-Bits " "Result %08f (bits:0x%x) to register " "idx %i (%i).\n", tid, seq_num, inst->readFloatResult(ud_idx), - inst->readIntResult(ud_idx), + inst->readFloatBitsResult(ud_idx), reg_idx - FP_Base_DepTag, flat_idx); // Check for FloatRegBits Here cpu->setFloatRegBits(flat_idx, - inst->readIntResult(ud_idx), + inst->readFloatBitsResult(ud_idx), inst->readTid()); } else if (inst->resultType(ud_idx) == InOrderDynInst::Float) { @@ -439,7 +439,6 @@ UseDefUnit::execute(int slot_idx) inst->readIntResult(ud_idx), reg_idx - FP_Base_DepTag, flat_idx); - // Check for FloatRegBits Here cpu->setFloatReg(flat_idx, inst->readFloatResult(ud_idx), inst->readTid()); |