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-rw-r--r--src/arch/x86/X86LocalApic.py1
-rw-r--r--src/dev/Device.py2
-rw-r--r--src/dev/Pci.py6
-rw-r--r--src/dev/sparc/T1000.py2
-rw-r--r--src/dev/x86/Cmos.py1
-rw-r--r--src/dev/x86/I8042.py1
-rw-r--r--src/dev/x86/I82094AA.py2
-rw-r--r--src/dev/x86/I8237.py1
-rw-r--r--src/dev/x86/I8254.py1
-rw-r--r--src/dev/x86/I8259.py1
-rw-r--r--src/dev/x86/PcSpeaker.py1
-rw-r--r--src/dev/x86/SouthBridge.py1
12 files changed, 6 insertions, 14 deletions
diff --git a/src/arch/x86/X86LocalApic.py b/src/arch/x86/X86LocalApic.py
index 283d94ba7..0bc36612d 100644
--- a/src/arch/x86/X86LocalApic.py
+++ b/src/arch/x86/X86LocalApic.py
@@ -46,7 +46,6 @@ from Device import BasicPioDevice
class X86LocalApic(BasicPioDevice):
type = 'X86LocalApic'
cxx_class = 'X86ISA::Interrupts'
- pio_latency = Param.Latency('1ns', 'Programmed IO latency in simticks')
int_master = MasterPort("Port for sending interrupt messages")
int_slave = SlavePort("Port for receiving interrupt messages")
int_latency = Param.Latency('1ns', \
diff --git a/src/dev/Device.py b/src/dev/Device.py
index 96c95ebc9..60c21df91 100644
--- a/src/dev/Device.py
+++ b/src/dev/Device.py
@@ -40,7 +40,7 @@ class BasicPioDevice(PioDevice):
type = 'BasicPioDevice'
abstract = True
pio_addr = Param.Addr("Device Address")
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
+ pio_latency = Param.Latency('1ns', "Programmed IO latency")
class DmaDevice(PioDevice):
type = 'DmaDevice'
diff --git a/src/dev/Pci.py b/src/dev/Pci.py
index c866f9386..db2791ed5 100644
--- a/src/dev/Pci.py
+++ b/src/dev/Pci.py
@@ -34,7 +34,9 @@ from Device import BasicPioDevice, DmaDevice, PioDevice
class PciConfigAll(PioDevice):
type = 'PciConfigAll'
platform = Param.Platform(Parent.any, "Platform this device is part of.")
- pio_latency = Param.Tick(1, "Programmed IO latency in simticks")
+ # @todo: This latency is unrealistically low and only kept at 1 tick
+ # to not change any regressions
+ pio_latency = Param.Latency('1t', "Programmed IO latency")
bus = Param.UInt8(0x00, "PCI bus to act as config space for")
size = Param.MemorySize32('16MB', "Size of config space")
@@ -47,7 +49,7 @@ class PciDevice(DmaDevice):
pci_bus = Param.Int("PCI bus")
pci_dev = Param.Int("PCI device number")
pci_func = Param.Int("PCI function code")
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
+ pio_latency = Param.Latency('1ns', "Programmed IO latency")
config_latency = Param.Latency('20ns', "Config read or write latency")
VendorID = Param.UInt16("Vendor ID")
diff --git a/src/dev/sparc/T1000.py b/src/dev/sparc/T1000.py
index aa66a9004..03a59ac67 100644
--- a/src/dev/sparc/T1000.py
+++ b/src/dev/sparc/T1000.py
@@ -47,7 +47,7 @@ class DumbTOD(BasicPioDevice):
class Iob(PioDevice):
type = 'Iob'
platform = Param.Platform(Parent.any, "Platform this device is part of.")
- pio_latency = Param.Latency('1ns', "Programed IO latency in simticks")
+ pio_latency = Param.Latency('1ns', "Programed IO latency")
class T1000(Platform):
diff --git a/src/dev/x86/Cmos.py b/src/dev/x86/Cmos.py
index 0e09d417b..266fb8937 100644
--- a/src/dev/x86/Cmos.py
+++ b/src/dev/x86/Cmos.py
@@ -36,6 +36,5 @@ class Cmos(BasicPioDevice):
cxx_class='X86ISA::Cmos'
time = Param.Time('01/01/2012',
"System time to use ('Now' for actual time)")
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
'Pin to signal RTC alarm interrupts to')
diff --git a/src/dev/x86/I8042.py b/src/dev/x86/I8042.py
index 31192adcd..57bf32ca0 100644
--- a/src/dev/x86/I8042.py
+++ b/src/dev/x86/I8042.py
@@ -34,7 +34,6 @@ from X86IntPin import X86IntSourcePin
class I8042(BasicPioDevice):
type = 'I8042'
cxx_class = 'X86ISA::I8042'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
# This isn't actually used for anything here.
pio_addr = 0x0
data_port = Param.Addr('Data port address')
diff --git a/src/dev/x86/I82094AA.py b/src/dev/x86/I82094AA.py
index 09923f6c2..3b076a9d6 100644
--- a/src/dev/x86/I82094AA.py
+++ b/src/dev/x86/I82094AA.py
@@ -35,8 +35,6 @@ class I82094AA(BasicPioDevice):
type = 'I82094AA'
cxx_class = 'X86ISA::I82094AA'
apic_id = Param.Int(1, 'APIC id for this IO APIC')
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
- pio_addr = Param.Addr("Device address")
int_master = MasterPort("Port for sending interrupt messages")
int_latency = Param.Latency('1ns', \
"Latency for an interrupt to propagate through this device.")
diff --git a/src/dev/x86/I8237.py b/src/dev/x86/I8237.py
index 20788a164..0121c3d24 100644
--- a/src/dev/x86/I8237.py
+++ b/src/dev/x86/I8237.py
@@ -33,4 +33,3 @@ from Device import BasicPioDevice
class I8237(BasicPioDevice):
type = 'I8237'
cxx_class = 'X86ISA::I8237'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
diff --git a/src/dev/x86/I8254.py b/src/dev/x86/I8254.py
index f468717cc..6fdcb1c8d 100644
--- a/src/dev/x86/I8254.py
+++ b/src/dev/x86/I8254.py
@@ -34,6 +34,5 @@ from X86IntPin import X86IntSourcePin
class I8254(BasicPioDevice):
type = 'I8254'
cxx_class = 'X86ISA::I8254'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
int_pin = Param.X86IntSourcePin(X86IntSourcePin(),
'Pin to signal timer interrupts to')
diff --git a/src/dev/x86/I8259.py b/src/dev/x86/I8259.py
index 0a516d30a..30ea14225 100644
--- a/src/dev/x86/I8259.py
+++ b/src/dev/x86/I8259.py
@@ -40,7 +40,6 @@ class X86I8259CascadeMode(Enum):
class I8259(BasicPioDevice):
type = 'I8259'
cxx_class='X86ISA::I8259'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
output = Param.X86IntSourcePin(X86IntSourcePin(),
'The pin this I8259 drives')
mode = Param.X86I8259CascadeMode('How this I8259 is cascaded')
diff --git a/src/dev/x86/PcSpeaker.py b/src/dev/x86/PcSpeaker.py
index 7ca62ec1e..cc1f5517a 100644
--- a/src/dev/x86/PcSpeaker.py
+++ b/src/dev/x86/PcSpeaker.py
@@ -33,5 +33,4 @@ from Device import BasicPioDevice
class PcSpeaker(BasicPioDevice):
type = 'PcSpeaker'
cxx_class = 'X86ISA::Speaker'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
i8254 = Param.I8254('Timer that drives the speaker')
diff --git a/src/dev/x86/SouthBridge.py b/src/dev/x86/SouthBridge.py
index 87f4c3798..7ac208d5e 100644
--- a/src/dev/x86/SouthBridge.py
+++ b/src/dev/x86/SouthBridge.py
@@ -45,7 +45,6 @@ def x86IOAddress(port):
class SouthBridge(SimObject):
type = 'SouthBridge'
- pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
platform = Param.Platform(Parent.any, "Platform this device is part of")
_pic1 = I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master')
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-27 06:51:20 +0000