diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/base/addr_range.hh | 6 | ||||
| -rw-r--r-- | src/base/types.cc | 4 | ||||
| -rw-r--r-- | src/base/types.hh | 14 | ||||
| -rw-r--r-- | src/dev/net/etherdevice.hh | 6 | ||||
| -rw-r--r-- | src/sim/core.cc | 2 | ||||
| -rw-r--r-- | src/sim/drain.hh | 4 | ||||
| -rw-r--r-- | src/sim/eventq.hh | 11 | ||||
| -rw-r--r-- | src/sim/init.cc | 38 | ||||
| -rw-r--r-- | src/sim/init.hh | 12 | ||||
| -rw-r--r-- | src/sim/simulate.cc | 2 | ||||
| -rw-r--r-- | src/sim/stat_register.hh | 2 |
11 files changed, 7 insertions, 94 deletions
diff --git a/src/base/addr_range.hh b/src/base/addr_range.hh index ed0259ff7..1137efa28 100644 --- a/src/base/addr_range.hh +++ b/src/base/addr_range.hh @@ -346,11 +346,6 @@ class AddrRange return false; } -/** - * Keep the operators away from SWIG. - */ -#ifndef SWIG - /** * Less-than operator used to turn an STL map into a binary search * tree of non-overlapping address ranges. @@ -384,7 +379,6 @@ class AddrRange { return !(*this == r); } -#endif // SWIG }; /** diff --git a/src/base/types.cc b/src/base/types.cc index 38b6bf2b2..ee918a4ed 100644 --- a/src/base/types.cc +++ b/src/base/types.cc @@ -30,8 +30,6 @@ #include "base/types.hh" -#ifndef SWIG // keep the operators away from SWIG - std::ostream& operator<<(std::ostream &out, const Cycles & cycles) { @@ -39,5 +37,3 @@ operator<<(std::ostream &out, const Cycles & cycles) return out; } -#endif // SWIG not touching operators - diff --git a/src/base/types.hh b/src/base/types.hh index 7b115901a..05a29f8bd 100644 --- a/src/base/types.hh +++ b/src/base/types.hh @@ -73,8 +73,7 @@ const Tick MaxTick = ULL(0xffffffffffffffff); * typedef, aiming to avoid unintentional mixing of cycles and ticks * in the code base. * - * Operators are defined inside an ifndef block to avoid swig touching - * them. Note that there is no overloading of the bool operator as the + * Note that there is no overloading of the bool operator as the * compiler is allowed to turn booleans into integers and this causes * a whole range of issues in a handful locations. The solution to * this problem would be to use the safe bool idiom, but for now we @@ -91,18 +90,12 @@ class Cycles public: -#ifndef SWIG // SWIG gets confused by constexpr /** Explicit constructor assigning a value. */ explicit constexpr Cycles(uint64_t _c) : c(_c) { } -#else - explicit Cycles(uint64_t _c) : c(_c) { } -#endif /** Default constructor for parameter classes. */ Cycles() : c(0) { } -#ifndef SWIG // keep the operators away from SWIG - /** Converting back to the value type. */ constexpr operator uint64_t() const { return c; } @@ -138,9 +131,6 @@ class Cycles { return Cycles(c >> shift); } friend std::ostream& operator<<(std::ostream &out, const Cycles & cycles); - -#endif // SWIG not touching operators - }; /** @@ -194,11 +184,9 @@ const PortID InvalidPortID = (PortID)-1; class FaultBase; typedef std::shared_ptr<FaultBase> Fault; -#ifndef SWIG // Swig gets really confused by decltype // Rather than creating a shared_ptr instance and assigning it nullptr, // we just create an alias. constexpr decltype(nullptr) NoFault = nullptr; -#endif struct AtomicOpFunctor { diff --git a/src/dev/net/etherdevice.hh b/src/dev/net/etherdevice.hh index d13a1c3c3..3ce54958d 100644 --- a/src/dev/net/etherdevice.hh +++ b/src/dev/net/etherdevice.hh @@ -128,10 +128,8 @@ class EtherDevice : public PciDevice * The Python object hierarchy includes the EtherDevBase class which * is used by some ethernet devices as a way to share common * configuration information in the generated param structs. Since the - * Python hierarchy is used to generate a SWIG interface for all C++ - * SimObjects, we need to reflect this in the C++ object hierarchy. If - * we don't, SWIG might end up doing 'bad things' when it down casts - * ethernet objects to their base class(es). + * Python hierarchy is used to generate a Python interfaces for all C++ + * SimObjects, we need to reflect this in the C++ object hierarchy. */ class EtherDevBase : public EtherDevice { diff --git a/src/sim/core.cc b/src/sim/core.cc index 279012f9b..00df23ed6 100644 --- a/src/sim/core.cc +++ b/src/sim/core.cc @@ -119,7 +119,7 @@ registerExitCallback(Callback *callback) } /** - * Do C++ simulator exit processing. Exported to SWIG to be invoked + * Do C++ simulator exit processing. Exported to Python to be invoked * when simulator terminates via Python's atexit mechanism. */ void diff --git a/src/sim/drain.hh b/src/sim/drain.hh index 7ff1d6e2a..3b01630a9 100644 --- a/src/sim/drain.hh +++ b/src/sim/drain.hh @@ -46,7 +46,6 @@ class Drainable; -#ifndef SWIG // SWIG doesn't support strongly typed enums /** * Object drain/handover states * @@ -75,7 +74,6 @@ enum class DrainState { Drained, /** Buffers drained, ready for serialization/handover */ Resuming, /** Transient state while the simulator is resuming */ }; -#endif /** * This class coordinates draining of a System. @@ -97,9 +95,7 @@ class DrainManager { private: DrainManager(); -#ifndef SWIG DrainManager(DrainManager &) = delete; -#endif ~DrainManager(); public: diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh index 0b76491ca..95a36ca7b 100644 --- a/src/sim/eventq.hh +++ b/src/sim/eventq.hh @@ -67,14 +67,11 @@ extern uint32_t numMainEventQueues; //! Array for main event queues. extern std::vector<EventQueue *> mainEventQueue; -#ifndef SWIG //! The current event queue for the running thread. Access to this queue //! does not require any locking from the thread. extern __thread EventQueue *_curEventQueue; -#endif - //! Current mode of execution: parallel / serial extern bool inParallelMode; @@ -356,13 +353,10 @@ class Event : public EventBase, public Serializable //! NULL. (Overridden in GlobalEvent::BarrierEvent.) virtual BaseGlobalEvent *globalEvent() { return NULL; } -#ifndef SWIG void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; -#endif }; -#ifndef SWIG inline bool operator<(const Event &l, const Event &r) { @@ -401,7 +395,6 @@ operator!=(const Event &l, const Event &r) { return l.when() != r.when() || l.priority() != r.priority(); } -#endif /** * Queue of events sorted in time order @@ -489,7 +482,6 @@ class EventQueue EventQueue(const EventQueue &); public: -#ifndef SWIG /** * Temporarily migrate execution to a different event queue. * @@ -549,7 +541,6 @@ class EventQueue private: EventQueue &eq; }; -#endif EventQueue(const std::string &n); @@ -665,7 +656,6 @@ class EventQueue void dumpMainQueue(); -#ifndef SWIG class EventManager { protected: @@ -778,6 +768,5 @@ class EventWrapper : public Event const char *description() const { return "EventWrapped"; } }; -#endif #endif // __SIM_EVENTQ_HH__ diff --git a/src/sim/init.cc b/src/sim/init.cc index 33cd4040f..70578197f 100644 --- a/src/sim/init.cc +++ b/src/sim/init.cc @@ -127,8 +127,7 @@ EmbeddedPython::addModule() const } /* - * Load and initialize all of the python parts of M5, including Swig - * and the embedded module importer. + * Load and initialize all of the python parts of M5. */ int EmbeddedPython::initAll() @@ -152,40 +151,6 @@ EmbeddedPython::initAll() return 0; } -EmbeddedSwig::EmbeddedSwig(void (*init_func)(), const string& _context) - : initFunc(init_func), context(_context) -{ - getList().push_back(this); -} - -list<EmbeddedSwig *> & -EmbeddedSwig::getList() -{ - static list<EmbeddedSwig *> the_list; - return the_list; -} - -void -EmbeddedSwig::initAll() -{ - char* old_context = _Py_PackageContext; - // initialize SWIG modules. initFunc() is autogenerated and calls - // all of the individual swig initialization functions. - for (auto i : getList()) { - // to ensure that the loaded modules are placed in the right - // package we have to be a bit unorthodox and directly - // manipulate the package context since swig simply calls - // Py_InitModule with nothing but the module name of the - // wrapper - char* cstr = new char[i->context.size() + 1]; - strcpy(cstr, i->context.c_str()); - _Py_PackageContext = cstr; - i->initFunc(); - delete[] cstr; - } - _Py_PackageContext = old_context; -} - EmbeddedPyBind::EmbeddedPyBind(const char *_name, void (*init_func)(py::module &), const char *_base) @@ -265,7 +230,6 @@ EmbeddedPyBind::initAll() int initM5Python() { - EmbeddedSwig::initAll(); EmbeddedPyBind::initAll(); return EmbeddedPython::initAll(); } diff --git a/src/sim/init.hh b/src/sim/init.hh index ecc4bc347..de6b44de4 100644 --- a/src/sim/init.hh +++ b/src/sim/init.hh @@ -80,18 +80,6 @@ struct EmbeddedPython static int initAll(); }; -struct EmbeddedSwig -{ - void (*initFunc)(); - - std::string context; - - EmbeddedSwig(void (*init_func)(), const std::string& _context); - - static std::list<EmbeddedSwig *> &getList(); - static void initAll(); -}; - class EmbeddedPyBind { public: diff --git a/src/sim/simulate.cc b/src/sim/simulate.cc index c6eb2ddf6..d3c27fa08 100644 --- a/src/sim/simulate.cc +++ b/src/sim/simulate.cc @@ -76,7 +76,7 @@ GlobalSimLoopExitEvent *simulate_limit_event = nullptr; /** Simulate for num_cycles additional cycles. If num_cycles is -1 * (the default), do not limit simulation; some other event must - * terminate the loop. Exported to Python via SWIG. + * terminate the loop. Exported to Python. * @return The SimLoopExitEvent that caused the loop to exit. */ GlobalSimLoopExitEvent * diff --git a/src/sim/stat_register.hh b/src/sim/stat_register.hh index bbe909321..36c015757 100644 --- a/src/sim/stat_register.hh +++ b/src/sim/stat_register.hh @@ -38,7 +38,7 @@ */ /* Provide a mechanism to register the Python stats reset/dump functions - * defined in src/swig/python/stats.i with the mechanisms in namespace + * defined in src/python/pybind11/stats.cc with the mechanisms in namespace * Stats */ #ifndef __SIM_STAT_REGISTER_H__ |