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-rw-r--r--src/dev/sparc/T1000.py4
-rw-r--r--src/dev/x86/Pc.py2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/dev/sparc/T1000.py b/src/dev/sparc/T1000.py
index 511f54b2c..99f083450 100644
--- a/src/dev/sparc/T1000.py
+++ b/src/dev/sparc/T1000.py
@@ -121,8 +121,8 @@ class T1000(Platform):
# earlier, since the bus object itself is typically defined at the
# System level.
def attachIO(self, bus):
- self.hvuart.terminal = self.hterm
- self.puart0.terminal = self.pterm
+ self.hvuart.device = self.hterm
+ self.puart0.device = self.pterm
self.fake_clk.pio = bus.master
self.fake_membnks.pio = bus.master
self.fake_l2_1.pio = bus.master
diff --git a/src/dev/x86/Pc.py b/src/dev/x86/Pc.py
index 3100f59b7..4d20214ad 100644
--- a/src/dev/x86/Pc.py
+++ b/src/dev/x86/Pc.py
@@ -65,7 +65,7 @@ class Pc(Platform):
# Serial port and terminal
com_1 = Uart8250()
com_1.pio_addr = x86IOAddress(0x3f8)
- com_1.terminal = Terminal()
+ com_1.device = Terminal()
# Devices to catch access to non-existant serial ports.
fake_com_2 = IsaFake(pio_addr=x86IOAddress(0x2f8), pio_size=8)