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-rw-r--r--src/mem/protocol/MOESI_CMP_token-L1cache.sm3
-rw-r--r--src/mem/protocol/MOESI_hammer-cache.sm3
-rw-r--r--src/mem/protocol/MOESI_hammer-dir.sm3
-rw-r--r--src/mem/slicc/ast/WakeUpDependentsStatementAST.py46
-rw-r--r--src/mem/slicc/parser.py5
-rw-r--r--src/mem/slicc/symbols/StateMachine.py24
6 files changed, 19 insertions, 65 deletions
diff --git a/src/mem/protocol/MOESI_CMP_token-L1cache.sm b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
index 5735fe203..edaf5f8ae 100644
--- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm
+++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm
@@ -177,6 +177,7 @@ machine(L1Cache, "Token protocol")
void set_tbe(TBE b);
void unset_tbe();
void wakeUpAllBuffers();
+ void wakeUpBuffers(Address a);
TBETable L1_TBEs, template_hack="<L1Cache_TBE>";
@@ -1522,7 +1523,7 @@ machine(L1Cache, "Token protocol")
}
action(kd_wakeUpDependents, "kd", desc="wake-up dependents") {
- wake_up_dependents(address);
+ wakeUpBuffers(address);
}
action(ka_wakeUpAllDependents, "ka", desc="wake-up all dependents") {
diff --git a/src/mem/protocol/MOESI_hammer-cache.sm b/src/mem/protocol/MOESI_hammer-cache.sm
index 94fd25f56..4bbf3bde1 100644
--- a/src/mem/protocol/MOESI_hammer-cache.sm
+++ b/src/mem/protocol/MOESI_hammer-cache.sm
@@ -159,6 +159,7 @@ machine(L1Cache, "AMD Hammer-like protocol")
void set_tbe(TBE b);
void unset_tbe();
void wakeUpAllBuffers();
+ void wakeUpBuffers(Address a);
Entry getCacheEntry(Address address), return_by_pointer="yes" {
Entry L2cache_entry := static_cast(Entry, "pointer", L2cacheMemory.lookup(address));
@@ -1013,7 +1014,7 @@ machine(L1Cache, "AMD Hammer-like protocol")
}
action(kd_wakeUpDependents, "kd", desc="wake-up dependents") {
- wake_up_dependents(address);
+ wakeUpBuffers(address);
}
action(ka_wakeUpAllDependents, "ka", desc="wake-up all dependents") {
diff --git a/src/mem/protocol/MOESI_hammer-dir.sm b/src/mem/protocol/MOESI_hammer-dir.sm
index 8f6cb14b7..439723d68 100644
--- a/src/mem/protocol/MOESI_hammer-dir.sm
+++ b/src/mem/protocol/MOESI_hammer-dir.sm
@@ -173,6 +173,7 @@ machine(Directory, "AMD Hammer-like protocol")
void unset_cache_entry();
void set_tbe(TBE a);
void unset_tbe();
+ void wakeUpBuffers(Address a);
// ** OBJECTS **
@@ -1013,7 +1014,7 @@ machine(Directory, "AMD Hammer-like protocol")
}
action(k_wakeUpDependents, "k", desc="wake-up dependents") {
- wake_up_dependents(address);
+ wakeUpBuffers(address);
}
action(l_popMemQueue, "q", desc="Pop off-chip request queue") {
diff --git a/src/mem/slicc/ast/WakeUpDependentsStatementAST.py b/src/mem/slicc/ast/WakeUpDependentsStatementAST.py
deleted file mode 100644
index 33630a9a4..000000000
--- a/src/mem/slicc/ast/WakeUpDependentsStatementAST.py
+++ /dev/null
@@ -1,46 +0,0 @@
-# Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
-# Copyright (c) 2009 The Hewlett-Packard Development Company
-# Copyright (c) 2010 Advanced Micro Devices, Inc.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-from slicc.ast.StatementAST import StatementAST
-
-class WakeUpDependentsStatementAST(StatementAST):
- def __init__(self, slicc, address):
- super(StatementAST, self).__init__(slicc)
- self.address = address
-
- def __repr__(self):
- return "[WakeUpDependentsStatementAst: %r]" % self.variable
-
- def generate(self, code, return_type):
- self.address.assertType("Address")
- address_code = self.address.var.code
- code('''
- if (m_waiting_buffers.count($address_code) > 0) {
- wakeUpBuffers($address_code);
- }
- ''')
diff --git a/src/mem/slicc/parser.py b/src/mem/slicc/parser.py
index fcf3c71ac..8095fc8b4 100644
--- a/src/mem/slicc/parser.py
+++ b/src/mem/slicc/parser.py
@@ -159,7 +159,6 @@ class SLICC(Grammar):
'state_declaration' : 'STATE_DECL',
'peek' : 'PEEK',
'stall_and_wait' : 'STALL_AND_WAIT',
- 'wake_up_dependents' : 'WAKE_UP_DEPENDENTS',
'enqueue' : 'ENQUEUE',
'copy_head' : 'COPY_HEAD',
'check_allocate' : 'CHECK_ALLOCATE',
@@ -577,10 +576,6 @@ class SLICC(Grammar):
"statement : STALL_AND_WAIT '(' var ',' var ')' SEMI"
p[0] = ast.StallAndWaitStatementAST(self, p[3], p[5])
- def p_statement__wake_up_dependents(self, p):
- "statement : WAKE_UP_DEPENDENTS '(' var ')' SEMI"
- p[0] = ast.WakeUpDependentsStatementAST(self, p[3])
-
def p_statement__peek(self, p):
"statement : PEEK '(' var ',' type pairs ')' statements"
p[0] = ast.PeekStatementAST(self, p[3], p[5], p[6], p[8], "peek")
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 301e34ea5..5be9b4ced 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -721,19 +721,21 @@ $c_ident::stallBuffer(MessageBuffer* buf, Address addr)
void
$c_ident::wakeUpBuffers(Address addr)
{
- //
- // Wake up all possible lower rank (i.e. lower priority) buffers that could
- // be waiting on this message.
- //
- for (int in_port_rank = m_cur_in_port_rank - 1;
- in_port_rank >= 0;
- in_port_rank--) {
- if ((*(m_waiting_buffers[addr]))[in_port_rank] != NULL) {
- (*(m_waiting_buffers[addr]))[in_port_rank]->reanalyzeMessages(addr);
+ if (m_waiting_buffers.count(addr) > 0) {
+ //
+ // Wake up all possible lower rank (i.e. lower priority) buffers that could
+ // be waiting on this message.
+ //
+ for (int in_port_rank = m_cur_in_port_rank - 1;
+ in_port_rank >= 0;
+ in_port_rank--) {
+ if ((*(m_waiting_buffers[addr]))[in_port_rank] != NULL) {
+ (*(m_waiting_buffers[addr]))[in_port_rank]->reanalyzeMessages(addr);
+ }
}
+ delete m_waiting_buffers[addr];
+ m_waiting_buffers.erase(addr);
}
- delete m_waiting_buffers[addr];
- m_waiting_buffers.erase(addr);
}
void