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-rw-r--r--src/arch/alpha/ev5.cc4
-rw-r--r--src/arch/sparc/ua2005.cc11
-rw-r--r--src/cpu/base.cc4
-rw-r--r--src/cpu/base.hh1
-rw-r--r--src/cpu/o3/alpha/cpu_impl.hh3
-rw-r--r--src/cpu/o3/commit_impl.hh3
-rw-r--r--src/cpu/o3/sparc/cpu_impl.hh1
-rw-r--r--src/cpu/ozone/cpu_impl.hh7
-rw-r--r--src/cpu/ozone/inorder_back_end_impl.hh4
-rw-r--r--src/cpu/simple/base.cc3
-rw-r--r--src/dev/alpha/tsunami_io.cc82
-rw-r--r--src/dev/alpha/tsunami_io.hh13
-rw-r--r--src/python/m5/objects/Tsunami.py2
-rw-r--r--src/python/m5/params.py70
14 files changed, 125 insertions, 83 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index 3d71fbda5..8d13511ac 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -94,8 +94,6 @@ AlphaISA::processInterrupts(CPU *cpu)
int ipl = 0;
int summary = 0;
- cpu->checkInterrupts = false;
-
if (cpu->readMiscReg(IPR_ASTRR))
panic("asynchronous traps not implemented\n");
@@ -155,8 +153,6 @@ SimpleThread::hwrei()
if (!misspeculating()) {
if (kernelStats)
kernelStats->hwrei();
-
- cpu->checkInterrupts = true;
}
// FIXME: XXX check for interrupts? XXX
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index 00a44275c..ecb63bb9a 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -48,7 +48,6 @@ MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_SOFTINT_CLR:
return setRegWithEffect(MISCREG_SOFTINT, ~val & softint, tc);
case MISCREG_SOFTINT_SET:
- tc->getCpuPtr()->checkInterrupts = true;
tc->getCpuPtr()->post_interrupt(soft_interrupt);
return setRegWithEffect(MISCREG_SOFTINT, val | softint, tc);
@@ -78,15 +77,9 @@ MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
break;
case MISCREG_PSTATE:
- if (val & PSTATE::ie && !(pstate & PSTATE::ie)) {
- tc->getCpuPtr()->checkInterrupts = true;
- }
setReg(miscReg, val);
case MISCREG_PIL:
- if (val < pil) {
- tc->getCpuPtr()->checkInterrupts = true;
- }
setReg(miscReg, val);
break;
@@ -110,7 +103,7 @@ MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_QUEUE_NRES_ERROR_HEAD:
case MISCREG_QUEUE_NRES_ERROR_TAIL:
setReg(miscReg, val);
- tc->getCpuPtr()->checkInterrupts = true;
+ //do something to post mondo interrupt
break;
case MISCREG_HSTICK_CMPR:
@@ -206,7 +199,6 @@ MiscRegFile::processSTickCompare(ThreadContext *tc)
(stick_cmpr & mask(63)));
if (!(tc->readMiscReg(MISCREG_STICK_CMPR) & (ULL(1) << 63))) {
tc->getCpuPtr()->post_interrupt(soft_interrupt);
- tc->getCpuPtr()->checkInterrupts = true;
setRegWithEffect(MISCREG_SOFTINT, softint | (ULL(1) << 16), tc);
}
} else
@@ -230,7 +222,6 @@ MiscRegFile::processHSTickCompare(ThreadContext *tc)
if (!(tc->readMiscReg(MISCREG_HSTICK_CMPR) & (ULL(1) << 63))) {
setRegWithEffect(MISCREG_HINTP, 1, tc);
tc->getCpuPtr()->post_interrupt(hstick_match);
- tc->getCpuPtr()->checkInterrupts = true;
}
// Need to do something to cause interrupt to happen here !!! @todo
} else
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index b03bc19a5..deb4e02c4 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -96,7 +96,7 @@ CPUProgressEvent::description()
#if FULL_SYSTEM
BaseCPU::BaseCPU(Params *p)
- : MemObject(p->name), clock(p->clock), instCnt(0), checkInterrupts(true),
+ : MemObject(p->name), clock(p->clock), instCnt(0),
params(p), number_of_threads(p->numberOfThreads), system(p->system),
phase(p->phase)
#else
@@ -334,7 +334,6 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU)
#if FULL_SYSTEM
interrupts = oldCPU->interrupts;
- checkInterrupts = oldCPU->checkInterrupts;
for (int i = 0; i < threadContexts.size(); ++i)
threadContexts[i]->profileClear();
@@ -371,7 +370,6 @@ BaseCPU::post_interrupt(int int_type)
void
BaseCPU::post_interrupt(int int_num, int index)
{
- checkInterrupts = true;
interrupts.post(int_num, index);
}
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 89c7d9dda..3ae9c60b6 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -106,7 +106,6 @@ class BaseCPU : public MemObject
virtual void post_interrupt(int int_num, int index);
virtual void clear_interrupt(int int_num, int index);
virtual void clear_interrupts();
- bool checkInterrupts;
bool check_interrupts(ThreadContext * tc) const
{ return interrupts.check_interrupts(tc); }
diff --git a/src/cpu/o3/alpha/cpu_impl.hh b/src/cpu/o3/alpha/cpu_impl.hh
index 98fd0699a..980e70fdd 100644
--- a/src/cpu/o3/alpha/cpu_impl.hh
+++ b/src/cpu/o3/alpha/cpu_impl.hh
@@ -217,8 +217,6 @@ AlphaO3CPU<Impl>::hwrei(unsigned tid)
this->thread[tid]->kernelStats->hwrei();
- this->checkInterrupts = true;
-
// FIXME: XXX check for interrupts? XXX
return NoFault;
}
@@ -270,7 +268,6 @@ AlphaO3CPU<Impl>::processInterrupts(Fault interrupt)
this->interrupts.updateIntrInfo(this->threadContexts[0]);
DPRINTF(O3CPU, "Interrupt %s being handled\n", interrupt->name());
- this->checkInterrupts = false;
this->trap(interrupt, 0);
}
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 96f094926..483c2f71b 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -671,8 +671,7 @@ DefaultCommit<Impl>::commit()
} else {
DPRINTF(Commit, "Interrupt pending, waiting for ROB to empty.\n");
}
- } else if (cpu->checkInterrupts &&
- cpu->check_interrupts(cpu->tcBase(0)) &&
+ } else if (cpu->check_interrupts(cpu->tcBase(0)) &&
commitStatus[0] != TrapPending &&
!trapSquash[0] &&
!tcSquash[0]) {
diff --git a/src/cpu/o3/sparc/cpu_impl.hh b/src/cpu/o3/sparc/cpu_impl.hh
index 536a620bf..66bf7d1c0 100644
--- a/src/cpu/o3/sparc/cpu_impl.hh
+++ b/src/cpu/o3/sparc/cpu_impl.hh
@@ -245,7 +245,6 @@ SparcO3CPU<Impl>::processInterrupts(Fault interrupt)
this->interrupts.updateIntrInfo(this->threadContexts[0]);
DPRINTF(O3CPU, "Interrupt %s being handled\n", interrupt->name());
- this->checkInterrupts = false;
this->trap(interrupt, 0);
}
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index accc8d294..a854de8de 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -182,10 +182,6 @@ OzoneCPU<Impl>::OzoneCPU(Params *p)
globalSeqNum = 1;
-#if FULL_SYSTEM
- checkInterrupts = false;
-#endif
-
lockFlag = 0;
// Setup rename table, initializing all values to ready.
@@ -684,8 +680,6 @@ OzoneCPU<Impl>::hwrei()
lockAddrList.clear();
thread.kernelStats->hwrei();
- checkInterrupts = true;
-
// FIXME: XXX check for interrupts? XXX
return NoFault;
}
@@ -704,7 +698,6 @@ OzoneCPU<Impl>::processInterrupts()
if (interrupt != NoFault) {
this->interrupts.updateIntrInfo(thread.getTC());
- this->checkInterrupts = false;
interrupt->invoke(thread.getTC());
}
}
diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh
index 87bf0a7a2..84f935a72 100644
--- a/src/cpu/ozone/inorder_back_end_impl.hh
+++ b/src/cpu/ozone/inorder_back_end_impl.hh
@@ -88,7 +88,6 @@ InorderBackEnd<Impl>::checkInterrupts()
int ipl = 0;
int summary = 0;
- cpu->checkInterrupts = false;
if (thread->readMiscReg(IPR_ASTRR))
panic("asynchronous traps not implemented\n");
@@ -151,8 +150,7 @@ InorderBackEnd<Impl>::tick()
// I'm waiting for it to drain. (for now just squash)
#if FULL_SYSTEM
if (interruptBlocked ||
- (cpu->checkInterrupts &&
- cpu->check_interrupts(tc))) {
+ cpu->check_interrupts(tc)) {
if (!robEmpty()) {
interruptBlocked = true;
//AlphaDep
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 14fefe103..b8d1f3bed 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -311,12 +311,11 @@ void
BaseSimpleCPU::checkForInterrupts()
{
#if FULL_SYSTEM
- if (checkInterrupts && check_interrupts(tc)) {
+ if (check_interrupts(tc)) {
Fault interrupt = interrupts.getInterrupt(tc);
if (interrupt != NoFault) {
interrupts.updateIntrInfo(tc);
- checkInterrupts = false;
interrupt->invoke(tc);
}
}
diff --git a/src/dev/alpha/tsunami_io.cc b/src/dev/alpha/tsunami_io.cc
index 38986b77e..d701dc98f 100644
--- a/src/dev/alpha/tsunami_io.cc
+++ b/src/dev/alpha/tsunami_io.cc
@@ -57,25 +57,77 @@ using namespace std;
//Should this be AlphaISA?
using namespace TheISA;
-TsunamiIO::RTC::RTC(const string &n, Tsunami* tsunami, time_t t, Tick i)
- : _name(n), event(tsunami, i), addr(0)
+TsunamiIO::RTC::RTC(const string &n, Tsunami* tsunami, const vector<int> &t,
+ bool bcd, Tick i)
+ : _name(n), event(tsunami, i), addr(0), year_is_bcd(bcd)
{
memset(clock_data, 0, sizeof(clock_data));
stat_regA = RTCA_32768HZ | RTCA_1024HZ;
stat_regB = RTCB_PRDC_IE |RTCB_BIN | RTCB_24HR;
+ if (year_is_bcd) {
+ // The RTC uses BCD for the last two digits in the year.
+ // They python year is a full year.
+ int _year = t[0] % 100;
+ int tens = _year / 10;
+ int ones = _year % 10;
+
+ year = (tens << 4) + ones;
+ } else {
+ // Even though the datasheet says that the year field should be
+ // interpreted as BCD, we just enter the number of years since
+ // 1900 since linux seems to be happy with that (and I believe
+ // that Tru64 was as well)
+ year = t[0] - 1900;
+ }
+
+ mon = t[1];
+ mday = t[2];
+ hour = t[3];
+ min = t[4];
+ sec = t[5];
+
+ // wday is defined to be in the range from 1 - 7 with 1 being Sunday.
+ // the value coming from python is in the range from 0 - 6 with 0 being
+ // Monday. Fix that here.
+ wday = t[6] + 2;
+ if (wday > 7)
+ wday -= 7;
+
+ DPRINTFN("Real-time clock set to %s", getDateString());
+}
+
+std::string
+TsunamiIO::RTC::getDateString()
+{
struct tm tm;
- gmtime_r(&t, &tm);
- sec = tm.tm_sec;
- min = tm.tm_min;
- hour = tm.tm_hour;
- wday = tm.tm_wday + 1;
- mday = tm.tm_mday;
- mon = tm.tm_mon + 1;
- year = tm.tm_year;
+ memset(&tm, 0, sizeof(tm));
+
+ if (year_is_bcd) {
+ // undo the BCD and conver to years since 1900 guessing that
+ // anything before 1970 is actually after 2000
+ int _year = (year >> 4) * 10 + (year & 0xf);
+ if (_year < 70)
+ _year += 100;
+
+ tm.tm_year = _year;
+ } else {
+ // number of years since 1900
+ tm.tm_year = year;
+ }
+
+ // unix is 0-11 for month
+ tm.tm_mon = mon - 1;
+ tm.tm_mday = mday;
+ tm.tm_hour = hour;
+ tm.tm_min = min;
+ tm.tm_sec = sec;
+
+ // to add more annoyance unix is 0 - 6 with 0 as sunday
+ tm.tm_wday = wday - 1;
- DPRINTFN("Real-time clock set to %s", asctime(&tm));
+ return asctime(&tm);
}
void
@@ -424,7 +476,8 @@ TsunamiIO::PITimer::Counter::CounterEvent::description()
TsunamiIO::TsunamiIO(Params *p)
: BasicPioDevice(p), tsunami(p->tsunami), pitimer(p->name + "pitimer"),
- rtc(p->name + ".rtc", p->tsunami, p->init_time, p->frequency)
+ rtc(p->name + ".rtc", p->tsunami, p->init_time, p->year_is_bcd,
+ p->frequency)
{
pioSize = 0x100;
@@ -649,7 +702,8 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiIO)
Param<Tick> frequency;
SimObjectParam<Platform *> platform;
SimObjectParam<System *> system;
- Param<time_t> time;
+ VectorParam<int> time;
+ Param<bool> year_is_bcd;
SimObjectParam<Tsunami *> tsunami;
END_DECLARE_SIM_OBJECT_PARAMS(TsunamiIO)
@@ -662,6 +716,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiIO)
INIT_PARAM(platform, "platform"),
INIT_PARAM(system, "system object"),
INIT_PARAM(time, "System time to use (0 for actual time"),
+ INIT_PARAM(year_is_bcd, ""),
INIT_PARAM(tsunami, "Tsunami")
END_INIT_SIM_OBJECT_PARAMS(TsunamiIO)
@@ -676,6 +731,7 @@ CREATE_SIM_OBJECT(TsunamiIO)
p->platform = platform;
p->system = system;
p->init_time = time;
+ p->year_is_bcd = year_is_bcd;
p->tsunami = tsunami;
return new TsunamiIO(p);
}
diff --git a/src/dev/alpha/tsunami_io.hh b/src/dev/alpha/tsunami_io.hh
index b0c368eb8..f42af4197 100644
--- a/src/dev/alpha/tsunami_io.hh
+++ b/src/dev/alpha/tsunami_io.hh
@@ -85,6 +85,9 @@ class TsunamiIO : public BasicPioDevice
/** Current RTC register address/index */
int addr;
+ /** should the year be interpreted as BCD? */
+ bool year_is_bcd;
+
/** Data for real-time clock function */
union {
uint8_t clock_data[10];
@@ -110,7 +113,8 @@ class TsunamiIO : public BasicPioDevice
uint8_t stat_regB;
public:
- RTC(const std::string &name, Tsunami* tsunami, time_t t, Tick i);
+ RTC(const std::string &name, Tsunami* tsunami,
+ const std::vector<int> &t, bool bcd, Tick i);
/** RTC address port: write address of RTC RAM data to access */
void writeAddr(const uint8_t data);
@@ -121,6 +125,9 @@ class TsunamiIO : public BasicPioDevice
/** RTC read data */
uint8_t readData();
+ /** RTC get the date */
+ std::string getDateString();
+
/**
* Serialize this object to the given output stream.
* @param base The base name of the counter object.
@@ -313,8 +320,10 @@ class TsunamiIO : public BasicPioDevice
{
Tick frequency;
Tsunami *tsunami;
- time_t init_time;
+ std::vector<int> init_time;
+ bool year_is_bcd;
};
+
protected:
const Params *params() const { return (const Params*)_params; }
diff --git a/src/python/m5/objects/Tsunami.py b/src/python/m5/objects/Tsunami.py
index 18a776a7f..85105ff20 100644
--- a/src/python/m5/objects/Tsunami.py
+++ b/src/python/m5/objects/Tsunami.py
@@ -15,6 +15,8 @@ class TsunamiIO(BasicPioDevice):
type = 'TsunamiIO'
time = Param.Time('01/01/2009',
"System time to use ('Now' for actual time)")
+ year_is_bcd = Param.Bool(False,
+ "The RTC should interpret the year as a BCD value")
tsunami = Param.Tsunami(Parent.any, "Tsunami")
frequency = Param.Frequency('1024Hz', "frequency of interrupts")
diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index d570804d8..f8a9f9ddd 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -518,49 +518,55 @@ class EthernetAddr(ParamValue):
else:
return self.value
+time_formats = [ "%a %b %d %H:%M:%S %Z %Y",
+ "%a %b %d %H:%M:%S %Z %Y",
+ "%Y/%m/%d %H:%M:%S",
+ "%Y/%m/%d %H:%M",
+ "%Y/%m/%d",
+ "%m/%d/%Y %H:%M:%S",
+ "%m/%d/%Y %H:%M",
+ "%m/%d/%Y",
+ "%m/%d/%y %H:%M:%S",
+ "%m/%d/%y %H:%M",
+ "%m/%d/%y"]
+
+
def parse_time(value):
- strings = [ "%a %b %d %H:%M:%S %Z %Y",
- "%a %b %d %H:%M:%S %Z %Y",
- "%Y/%m/%d %H:%M:%S",
- "%Y/%m/%d %H:%M",
- "%Y/%m/%d",
- "%m/%d/%Y %H:%M:%S",
- "%m/%d/%Y %H:%M",
- "%m/%d/%Y",
- "%m/%d/%y %H:%M:%S",
- "%m/%d/%y %H:%M",
- "%m/%d/%y"]
-
- for string in strings:
- try:
- return time.strptime(value, string)
- except ValueError:
- pass
+ from time import gmtime, strptime, struct_time, time
+ from datetime import datetime, date
+
+ if isinstance(value, struct_time):
+ return value
+
+ if isinstance(value, (int, long)):
+ return gmtime(value)
+
+ if isinstance(value, (datetime, date)):
+ return value.timetuple()
+
+ if isinstance(value, str):
+ if value in ('Now', 'Today'):
+ return time.gmtime(time.time())
+
+ for format in time_formats:
+ try:
+ return strptime(value, format)
+ except ValueError:
+ pass
raise ValueError, "Could not parse '%s' as a time" % value
class Time(ParamValue):
cxx_type = 'time_t'
def __init__(self, value):
- if isinstance(value, time.struct_time):
- self.value = time.mktime(value)
- elif isinstance(value, int):
- self.value = value
- elif isinstance(value, str):
- if value in ('Now', 'Today'):
- self.value = time.time()
- else:
- self.value = time.mktime(parse_time(value))
- elif isinstance(value, (datetime.datetime, datetime.date)):
- self.value = time.mktime(value.timetuple())
- else:
- raise ValueError, "Could not parse '%s' as a time" % value
+ self.value = parse_time(value)
def __str__(self):
- return str(int(self.value))
+ tm = self.value
+ return ' '.join([ str(tm[i]) for i in xrange(8)])
def ini_str(self):
- return str(int(self.value))
+ return str(self)
# Enumerated types are a little more complex. The user specifies the
# type as Enum(foo) where foo is either a list or dictionary of
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-15 10:25:40 +0000