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-rw-r--r--src/cpu/simple/atomic.cc3
-rw-r--r--src/mem/cache/cache_impl.hh10
-rw-r--r--src/mem/cache/tags/lru.cc2
3 files changed, 12 insertions, 3 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index be6f421b3..b7202cbbb 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -124,15 +124,18 @@ AtomicSimpleCPU::AtomicSimpleCPU(Params *p)
// @todo fix me and get the real cpu id & thread number!!!
ifetch_req = new Request();
+ ifetch_req->setThreadContext(0,0); //Need CPU/Thread IDS HERE
ifetch_pkt = new Packet(ifetch_req, Packet::ReadReq, Packet::Broadcast);
ifetch_pkt->dataStatic(&inst);
data_read_req = new Request();
+ data_read_req->setThreadContext(0,0); //Need CPU/Thread IDS HERE
data_read_pkt = new Packet(data_read_req, Packet::ReadReq,
Packet::Broadcast);
data_read_pkt->dataStatic(&dataReg);
data_write_req = new Request();
+ data_write_req->setThreadContext(0,0); //Need CPU/Thread IDS HERE
data_write_pkt = new Packet(data_write_req, Packet::WriteReq,
Packet::Broadcast);
}
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 0cb33461b..aae5cbf01 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -82,6 +82,8 @@ doAtomicAccess(Packet *pkt, bool isCpuSide)
if (isCpuSide)
{
probe(pkt, true);
+ //TEMP ALWAYS SUCCES FOR NOW
+ pkt->result = Packet::Success;
}
else
{
@@ -101,7 +103,11 @@ doFunctionalAccess(Packet *pkt, bool isCpuSide)
{
if (isCpuSide)
{
+ //TEMP USE CPU?THREAD 0 0
+ pkt->req->setThreadContext(0,0);
probe(pkt, true);
+ //TEMP ALWAYS SUCCESFUL FOR NOW
+ pkt->result = Packet::Success;
}
else
{
@@ -594,12 +600,12 @@ Cache<TagStore,Buffering,Coherence>::probe(Packet * &pkt, bool update)
lat = memSidePort->sendAtomic(busPkt);
- if (!(busPkt->flags & SATISFIED)) {
+/* if (!(busPkt->flags & SATISFIED)) {
// blocked at a higher level, just return
return 0;
}
- misses[pkt->cmdToIndex()][pkt->req->getThreadNum()]++;
+*/ misses[pkt->cmdToIndex()][pkt->req->getThreadNum()]++;
CacheBlk::State old_state = (blk) ? blk->status : 0;
tags->handleFill(blk, busPkt,
diff --git a/src/mem/cache/tags/lru.cc b/src/mem/cache/tags/lru.cc
index b7259bd3a..556025a3a 100644
--- a/src/mem/cache/tags/lru.cc
+++ b/src/mem/cache/tags/lru.cc
@@ -188,7 +188,7 @@ LRUBlk*
LRU::findBlock(Packet * &pkt, int &lat)
{
Addr addr = pkt->getAddr();
- int asid = pkt->req->getAsid();
+ int asid = 0;//pkt->req->getAsid();
Addr tag = extractTag(addr);
unsigned set = extractSet(addr);