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-rw-r--r--src/arch/sparc/regfile.hh26
-rw-r--r--src/arch/sparc/ua2005.cc23
-rw-r--r--src/cpu/base.cc4
-rw-r--r--src/cpu/cpuevent.cc61
-rw-r--r--src/cpu/cpuevent.hh88
5 files changed, 190 insertions, 12 deletions
diff --git a/src/arch/sparc/regfile.hh b/src/arch/sparc/regfile.hh
index c69b9cee8..5322ffb37 100644
--- a/src/arch/sparc/regfile.hh
+++ b/src/arch/sparc/regfile.hh
@@ -33,7 +33,7 @@
#include "arch/sparc/faults.hh"
#include "base/trace.hh"
#include "sim/byteswap.hh"
-#include "sim/eventq.hh"
+#include "cpu/cpuevent.hh"
#include "sim/host.hh"
class Checkpoint;
@@ -557,28 +557,31 @@ namespace SparcISA
// These need to check the int_dis field and if 0 then
// set appropriate bit in softint and checkinterrutps on the cpu
- void processTickCompare() { panic("tick compare not implemented\n"); }
- void processSTickCompare(){ panic("tick compare not implemented\n"); }
- void processHSTickCompare(){ panic("tick compare not implemented\n"); }
+#if FULL_SYSTEM
+ /** Process a tick compare event and generate an interrupt on the cpu if
+ * appropriate. */
+ void processTickCompare(ExecContext *xc);
+ void processSTickCompare(ExecContext *xc);
+ void processHSTickCompare(ExecContext *xc);
- typedef EventWrapper<MiscRegFile,
+ typedef CpuEventWrapper<MiscRegFile,
&MiscRegFile::processTickCompare> TickCompareEvent;
- TickCompareEvent tickCompare;
+ TickCompareEvent *tickCompare;
- typedef EventWrapper<MiscRegFile,
+ typedef CpuEventWrapper<MiscRegFile,
&MiscRegFile::processSTickCompare> STickCompareEvent;
- STickCompareEvent sTickCompare;
+ STickCompareEvent *sTickCompare;
- typedef EventWrapper<MiscRegFile,
+ typedef CpuEventWrapper<MiscRegFile,
&MiscRegFile::processHSTickCompare> HSTickCompareEvent;
- HSTickCompareEvent hSTickCompare;
+ HSTickCompareEvent *hSTickCompare;
/** Fullsystem only register version of ReadRegWithEffect() */
MiscReg readFSRegWithEffect(int miscReg, Fault &fault, ExecContext *xc);
/** Fullsystem only register version of SetRegWithEffect() */
Fault setFSRegWithEffect(int miscReg, const MiscReg &val,
ExecContext * xc);
-
+#endif
public:
void reset()
@@ -636,7 +639,6 @@ namespace SparcISA
}
MiscRegFile()
- : tickCompare(this), sTickCompare(this), hSTickCompare(this)
{
reset();
}
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index 3c6cfe9c5..680e94080 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -56,6 +56,8 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_TICK_CMPR:
if (isNonPriv())
return new PrivilegedOpcode;
+ if (tickCompare == NULL)
+ tickCompare = new TickCompareEvent(this, xc);
setReg(miscReg, val);
if (tick_cmprFields.int_dis && tickCompare.scheduled())
tickCompare.deschedule();
@@ -78,6 +80,8 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_STICK_CMPR:
if (isNonPriv())
return new PrivilegedOpcode;
+ if (sTickCompare == NULL)
+ sTickCompare = new STickCompareEvent(this, xc);
sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
assert(sys != NULL);
setReg(miscReg, val);
@@ -120,6 +124,8 @@ SparcISA::MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_HSTICK_CMPR:
if (isNonPriv())
return new PrivilegedOpcode;
+ if (hSTickCompare == NULL)
+ hSTickCompare = new HSTickCompareEvent(this, xc);
sys = dynamic_cast<SparcSystem*>(xc->getSystemPtr());
assert(sys != NULL);
setReg(miscReg, val);
@@ -195,5 +201,22 @@ MiscRegFile::readFSRegWithEffect(int miscReg, Fault &fault, ExecContext * xc)
}
}
+void
+MiscRegFile::processTickCompare(ExecContext *xc)
+{
+ panic("tick compare not implemented\n");
+}
+
+void
+MiscRegFile::processSTickCompare(ExecContext *xc)
+{
+ panic("tick compare not implemented\n");
+}
+
+void
+MiscRegFile::processHSTickCompare(ExecContext *xc)
+{
+ panic("tick compare not implemented\n");
+}
}; // namespace SparcISA
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 9ce458c64..fb6116fd4 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -35,6 +35,7 @@
#include "base/misc.hh"
#include "base/output.hh"
#include "cpu/base.hh"
+#include "cpu/cpuevent.hh"
#include "cpu/exec_context.hh"
#include "cpu/profile.hh"
#include "cpu/sampler/sampler.hh"
@@ -259,6 +260,9 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU)
ExecContext *oldXC = oldCPU->execContexts[i];
newXC->takeOverFrom(oldXC);
+
+ CpuEvent::replaceExecContext(oldXC, newXC);
+
assert(newXC->readCpuId() == oldXC->readCpuId());
#if FULL_SYSTEM
system->replaceExecContext(newXC, newXC->readCpuId());
diff --git a/src/cpu/cpuevent.cc b/src/cpu/cpuevent.cc
new file mode 100644
index 000000000..ae1dd7fa3
--- /dev/null
+++ b/src/cpu/cpuevent.cc
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ */
+
+#include "cpu/cpuevent.hh"
+
+/** Static list of all CpuEvent objects so we can modify their execution
+ * contexts as needed. */
+CpuEvent::CpuEventList CpuEvent::cpuEventList;
+
+CpuEvent::~CpuEvent()
+{
+ CpuEventList::iterator i;
+
+ // delete the event from the global list
+ for (i = cpuEventList.begin(); i != cpuEventList.end(); ) {
+ if (*i == this)
+ i = cpuEventList.erase(i);
+ else
+ i++;
+ }
+}
+
+void
+CpuEvent::replaceExecContext(ExecContext *oldXc, ExecContext *newXc)
+{
+ CpuEventList::iterator i;
+
+ // Update any events that have the old execution context with the new exec
+ // context
+ for (i = cpuEventList.begin(); i != cpuEventList.end(); i++) {
+ if ((*i)->xc == oldXc)
+ (*i)->xc = newXc;
+ }
+}
diff --git a/src/cpu/cpuevent.hh b/src/cpu/cpuevent.hh
new file mode 100644
index 000000000..10359b121
--- /dev/null
+++ b/src/cpu/cpuevent.hh
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2006 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ */
+
+#ifndef __CPU_CPUEVENT_HH__
+#define __CPU_CPUEVENT_HH__
+
+#include <vector>
+#include "sim/eventq.hh"
+
+class ExecContext;
+
+/** This class creates a global list of events than need a pointer to an
+ * execution context. When a switchover takes place the events can be migrated
+ * to the new execution context, otherwise you could have a wake timer interrupt
+ * go off on a switched out cpu or other unfortunate events. This object MUST be
+ * dynamically allocated to avoid it being deleted after a cpu switch happens.
+ * */
+class CpuEvent : public Event
+{
+ private:
+ /** type of global list of cpu events. */
+ typedef std::vector<CpuEvent *> CpuEventList;
+
+ /** Static list of cpu events that is searched every time a cpu switch
+ * happens. */
+ static CpuEventList cpuEventList;
+
+ /** The execution context that is switched to the new cpus. */
+ ExecContext *xc;
+
+ public:
+ CpuEvent(EventQueue *q, ExecContext *_xc, Priority p = Default_Pri)
+ : Event(q, p), xc(_xc)
+ { cpuEventList.push_back(this); }
+
+ /** delete the cpu event from the global list. */
+ ~CpuEvent();
+
+ /** Update all events switching old xc to new xc.
+ * @param oldXc the old exeuction context we are switching from
+ * @param newXc the new execution context we are switching to.
+ */
+ static void replaceExecContext(ExecContext *oldXc, ExecContext *newXc);
+};
+
+template <class T, void (T::* F)(ExecContext *xc)>
+class CpuEventWrapper : public CpuEvent
+{
+ private:
+ T *object;
+
+ public:
+ CpuEventWrapper(T *obj, ExecContext *_xc, EventQueue *q = &mainEventQueue,
+ Priority p = Default_Pri)
+ : CpuEvent(q, _xc, p), object(obj)
+ { }
+ void process() { (object->*F)(xc); }
+};
+
+#endif // __CPU_CPUEVENT_HH__
+
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