diff options
Diffstat (limited to 'tests/configs/base_config.py')
| -rw-r--r-- | tests/configs/base_config.py | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/tests/configs/base_config.py b/tests/configs/base_config.py index a3e1e0271..3f28ada5d 100644 --- a/tests/configs/base_config.py +++ b/tests/configs/base_config.py @@ -58,7 +58,8 @@ class BaseSystem(object): __metaclass__ = ABCMeta def __init__(self, mem_mode='timing', mem_class=SimpleMemory, - cpu_class=TimingSimpleCPU, num_cpus=1, checker=False, + cpu_class=TimingSimpleCPU, num_cpus=1, num_threads=1, + checker=False, mem_size=None): """Initialize a simple base system. @@ -74,11 +75,13 @@ class BaseSystem(object): self.mem_class = mem_class self.cpu_class = cpu_class self.num_cpus = num_cpus + self.num_threads = num_threads self.checker = checker def create_cpus(self, cpu_clk_domain): """Return a list of CPU objects to add to a system.""" - cpus = [ self.cpu_class(clk_domain = cpu_clk_domain, + cpus = [ self.cpu_class(clk_domain=cpu_clk_domain, + numThreads=self.num_threads, cpu_id=i) for i in range(self.num_cpus) ] if self.checker: @@ -187,7 +190,8 @@ class BaseSESystem(BaseSystem): def create_system(self): system = System(physmem = self.mem_class(), membus = SystemXBar(), - mem_mode = self.mem_mode) + mem_mode = self.mem_mode, + multi_thread = (self.num_threads > 1)) system.system_port = system.membus.slave system.physmem.port = system.membus.master self.init_system(system) |