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-rw-r--r--tests/configs/base_config.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/configs/base_config.py b/tests/configs/base_config.py
index 5637ca3f5..c440d48d9 100644
--- a/tests/configs/base_config.py
+++ b/tests/configs/base_config.py
@@ -104,7 +104,7 @@ class BaseSystem(object):
Returns:
A bus that CPUs should use to connect to the shared cache.
"""
- system.toL2Bus = CoherentXBar(clk_domain=system.cpu_clk_domain)
+ system.toL2Bus = L2XBar(clk_domain=system.cpu_clk_domain)
system.l2c = L2Cache(clk_domain=system.cpu_clk_domain,
size='4MB', assoc=8)
system.l2c.cpu_side = system.toL2Bus.master
@@ -186,7 +186,7 @@ class BaseSESystem(BaseSystem):
def create_system(self):
system = System(physmem = self.mem_class(),
- membus = CoherentXBar(),
+ membus = SystemXBar(),
mem_mode = self.mem_mode)
system.system_port = system.membus.slave
system.physmem.port = system.membus.master