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Diffstat (limited to 'tests/configs/o3-timing-mp.py')
-rw-r--r-- | tests/configs/o3-timing-mp.py | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/tests/configs/o3-timing-mp.py b/tests/configs/o3-timing-mp.py index 68631b3d2..331e2c569 100644 --- a/tests/configs/o3-timing-mp.py +++ b/tests/configs/o3-timing-mp.py @@ -71,7 +71,6 @@ system.l2c.mem_side = system.membus.port for cpu in cpus: cpu.addPrivateSplitL1Caches(L1(size = '32kB', assoc = 1), L1(size = '32kB', assoc = 4)) - cpu.mem = cpu.dcache # connect cpu level-1 caches to shared level-2 cache cpu.connectMemPorts(system.toL2Bus) |