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Diffstat (limited to 'tests/configs/realview-o3-dual.py')
-rw-r--r-- | tests/configs/realview-o3-dual.py | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/tests/configs/realview-o3-dual.py b/tests/configs/realview-o3-dual.py index ad1c4752b..2f06ab2d7 100644 --- a/tests/configs/realview-o3-dual.py +++ b/tests/configs/realview-o3-dual.py @@ -88,6 +88,8 @@ system.l2c.mem_side = system.membus.slave for c in cpus: c.addPrivateSplitL1Caches(L1(size = '32kB', assoc = 1), L1(size = '32kB', assoc = 4)) + # create the interrupt controller + c.createInterruptController() # connect cpu level-1 caches to shared level-2 cache c.connectAllPorts(system.toL2Bus, system.membus) c.clock = '2GHz' |