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Diffstat (limited to 'tests/configs/simple-atomic-ruby.py')
| -rw-r--r-- | tests/configs/simple-atomic-ruby.py | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/tests/configs/simple-atomic-ruby.py b/tests/configs/simple-atomic-ruby.py deleted file mode 100644 index 21d90e56f..000000000 --- a/tests/configs/simple-atomic-ruby.py +++ /dev/null @@ -1,42 +0,0 @@ -# Copyright (c) 2006-2007 The Regents of The University of Michigan -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are -# met: redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer; -# redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution; -# neither the name of the copyright holders nor the names of its -# contributors may be used to endorse or promote products derived from -# this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# -# Authors: Steve Reinhardt - -import m5 -from m5.objects import * - -import ruby_config -ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", 1) - -system = System(cpu = AtomicSimpleCPU(cpu_id=0), - physmem = ruby_memory, - membus = Bus()) -system.physmem.port = system.membus.port -system.cpu.connectMemPorts(system.membus) -system.cpu.clock = '2GHz' - -root = Root(system = system) |