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-rw-r--r--tests/configs/simple-timing-mp-ruby.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/configs/simple-timing-mp-ruby.py b/tests/configs/simple-timing-mp-ruby.py
index 835428c3b..f7dfb5c5c 100644
--- a/tests/configs/simple-timing-mp-ruby.py
+++ b/tests/configs/simple-timing-mp-ruby.py
@@ -83,7 +83,7 @@ Ruby.create_system(options, system)
# Create a separate clock domain for Ruby
system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock)
-assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
+assert(options.num_cpus == len(system.ruby._cpu_ports))
for (i, cpu) in enumerate(system.cpu):
# create the interrupt controller
@@ -92,7 +92,7 @@ for (i, cpu) in enumerate(system.cpu):
#
# Tie the cpu ports to the ruby cpu ports
#
- cpu.connectAllPorts(system.ruby._cpu_ruby_ports[i])
+ cpu.connectAllPorts(system.ruby._cpu_ports[i])
# -----------------------
# run simulation