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-rw-r--r--tests/configs/simple-timing-mp.py2
1 files changed, 2 insertions, 0 deletions
diff --git a/tests/configs/simple-timing-mp.py b/tests/configs/simple-timing-mp.py
index 6f4090ec2..f1ebb1939 100644
--- a/tests/configs/simple-timing-mp.py
+++ b/tests/configs/simple-timing-mp.py
@@ -75,6 +75,8 @@ for cpu in cpus:
cpu.connectAllPorts(system.toL2Bus, system.membus)
cpu.clock = '2GHz'
+system.system_port = system.membus.port
+
# connect memory to membus
system.physmem.port = system.membus.port