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-rw-r--r--tests/configs/simple-timing-mp.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/tests/configs/simple-timing-mp.py b/tests/configs/simple-timing-mp.py
index aad15a2ac..1acfacbdf 100644
--- a/tests/configs/simple-timing-mp.py
+++ b/tests/configs/simple-timing-mp.py
@@ -36,6 +36,7 @@ cpus = [ TimingSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ]
# system simulated
system = System(cpu = cpus, physmem = SimpleMemory(), membus = CoherentBus())
+system.clock = '1GHz'
# l2cache & bus
system.toL2Bus = CoherentBus(clock = '2GHz')