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-rw-r--r--tests/configs/simple-timing.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/configs/simple-timing.py b/tests/configs/simple-timing.py
index cd6bee863..5269f4127 100644
--- a/tests/configs/simple-timing.py
+++ b/tests/configs/simple-timing.py
@@ -44,7 +44,7 @@ cpu.addTwoLevelCacheHierarchy(MyL1Cache(size = '128kB'),
MyL1Cache(size = '256kB'),
MyCache(size = '2MB', latency='10ns'))
system = System(cpu = cpu,
- physmem = PhysicalMemory(),
+ physmem = SimpleMemory(),
membus = Bus())
system.system_port = system.membus.slave
system.physmem.port = system.membus.master