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-rw-r--r--tests/configs/t1000-simple-atomic.py10
1 files changed, 9 insertions, 1 deletions
diff --git a/tests/configs/t1000-simple-atomic.py b/tests/configs/t1000-simple-atomic.py
index c0744a6a2..64c3dc408 100644
--- a/tests/configs/t1000-simple-atomic.py
+++ b/tests/configs/t1000-simple-atomic.py
@@ -31,7 +31,7 @@ from m5.objects import *
m5.util.addToPath('../configs/common')
import FSConfig
-system = FSConfig.makeSparcSystem('atomic', SimpleMemory)
+system = FSConfig.makeSparcSystem('atomic')
system.clk_domain = SrcClockDomain(clock = '1GHz')
system.cpu_clk_domain = SrcClockDomain(clock = '1GHz')
cpu = AtomicSimpleCPU(cpu_id=0, clk_domain = system.cpu_clk_domain)
@@ -40,6 +40,14 @@ system.cpu = cpu
cpu.createInterruptController()
cpu.connectAllPorts(system.membus)
+# create the memory controllers and connect them, stick with
+# the physmem name to avoid bumping all the reference stats
+system.physmem = [SimpleMemory(range = r,
+ conf_table_reported = True)
+ for r in system.mem_ranges]
+for i in xrange(len(system.physmem)):
+ system.physmem[i].port = system.membus.master
+
root = Root(full_system=True, system=system)
m5.ticks.setGlobalFrequency('2GHz')