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Diffstat (limited to 'tests/configs/tsunami-simple-timing.py')
| -rw-r--r-- | tests/configs/tsunami-simple-timing.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/configs/tsunami-simple-timing.py b/tests/configs/tsunami-simple-timing.py index 0c3984628..9a262b3b2 100644 --- a/tests/configs/tsunami-simple-timing.py +++ b/tests/configs/tsunami-simple-timing.py @@ -90,7 +90,7 @@ system.l2c.mem_side = system.membus.port cpu.addPrivateSplitL1Caches(L1(size = '32kB', assoc = 1), L1(size = '32kB', assoc = 4)) # connect cpu level-1 caches to shared level-2 cache -cpu.connectMemPorts(system.toL2Bus) +cpu.connectAllPorts(system.toL2Bus, system.membus) cpu.clock = '2GHz' root = Root(system=system) |