diff options
Diffstat (limited to 'tests/long/00.gzip/ref/arm/linux/simple-timing')
4 files changed, 11 insertions, 16 deletions
diff --git a/tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini b/tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini index cd3bf6aae..5a251a60a 100644 --- a/tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini @@ -164,7 +164,7 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=gzip input.log 1 -cwd=build/ARM_SE/tests/fast/long/00.gzip/arm/linux/simple-timing +cwd=build/ARM_SE/tests/opt/long/00.gzip/arm/linux/simple-timing egid=100 env= errout=cerr diff --git a/tests/long/00.gzip/ref/arm/linux/simple-timing/simerr b/tests/long/00.gzip/ref/arm/linux/simple-timing/simerr index c1c8fcec5..eabe42249 100755 --- a/tests/long/00.gzip/ref/arm/linux/simple-timing/simerr +++ b/tests/long/00.gzip/ref/arm/linux/simple-timing/simerr @@ -1,7 +1,3 @@ warn: Sockets disabled, not accepting gdb connections For more information see: http://www.m5sim.org/warn/d946bea6 -warn: Complete acc isn't called on normal stores in O3. -For more information see: http://www.m5sim.org/warn/138d8573 -warn: Complete acc isn't called on normal stores in O3. -For more information see: http://www.m5sim.org/warn/138d8573 hack: be nice to actually delete the event here diff --git a/tests/long/00.gzip/ref/arm/linux/simple-timing/simout b/tests/long/00.gzip/ref/arm/linux/simple-timing/simout index 3d2816f3e..9680f68d5 100755 --- a/tests/long/00.gzip/ref/arm/linux/simple-timing/simout +++ b/tests/long/00.gzip/ref/arm/linux/simple-timing/simout @@ -5,11 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Mar 11 2011 20:10:09 -M5 revision 4decc284606a 8095 default qtip tip ext/update_add_stats.patch -M5 started Mar 11 2011 20:13:11 +M5 compiled Mar 30 2011 17:47:57 +M5 started Mar 30 2011 17:54:33 M5 executing on u200439-lin.austin.arm.com -command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/00.gzip/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/fast/long/00.gzip/arm/linux/simple-timing +command line: build/ARM_SE/m5.opt -d build/ARM_SE/tests/opt/long/00.gzip/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/opt/long/00.gzip/arm/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... spec_init diff --git a/tests/long/00.gzip/ref/arm/linux/simple-timing/stats.txt b/tests/long/00.gzip/ref/arm/linux/simple-timing/stats.txt index bc2095464..9997800cb 100644 --- a/tests/long/00.gzip/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/00.gzip/ref/arm/linux/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 732997 # Simulator instruction rate (inst/s) -host_mem_usage 253960 # Number of bytes of host memory used -host_seconds 819.10 # Real time elapsed on the host -host_tick_rate 972728993 # Simulator tick rate (ticks/s) +host_inst_rate 590565 # Simulator instruction rate (inst/s) +host_mem_usage 254684 # Number of bytes of host memory used +host_seconds 1016.65 # Real time elapsed on the host +host_tick_rate 783712761 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 600398281 # Number of instructions simulated sim_seconds 0.796763 # Number of seconds simulated @@ -249,18 +249,18 @@ system.cpu.numCycles 1593525852 # nu system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.num_busy_cycles 1593525852 # Number of busy cycles -system.cpu.num_conditional_control_insts 67016068 # number of instructions that are conditional controls +system.cpu.num_conditional_control_insts 67017827 # number of instructions that are conditional controls system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses system.cpu.num_fp_insts 16 # number of float instructions system.cpu.num_fp_register_reads 16 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu.num_func_calls 1993596 # number of times a function call or return occured +system.cpu.num_func_calls 1993546 # number of times a function call or return occured system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 600398281 # Number of instructions executed system.cpu.num_int_alu_accesses 533522639 # Number of integer alu accesses system.cpu.num_int_insts 533522639 # number of integer instructions system.cpu.num_int_register_reads 1840897552 # number of times the integer registers were read -system.cpu.num_int_register_writes 458086291 # number of times the integer registers were written +system.cpu.num_int_register_writes 458076290 # number of times the integer registers were written system.cpu.num_load_insts 148952594 # Number of load instructions system.cpu.num_mem_refs 219173607 # number of memory refs system.cpu.num_store_insts 70221013 # Number of store instructions |