summaryrefslogtreecommitdiff
path: root/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt
diff options
context:
space:
mode:
Diffstat (limited to 'tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt')
-rw-r--r--tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt28
1 files changed, 14 insertions, 14 deletions
diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt b/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt
index 04c8a25b6..9d595253b 100644
--- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt
+++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 280029 # Simulator instruction rate (inst/s)
-host_mem_usage 206320 # Number of bytes of host memory used
-host_seconds 5019.49 # Real time elapsed on the host
-host_tick_rate 116031336 # Simulator tick rate (ticks/s)
+host_inst_rate 154343 # Simulator instruction rate (inst/s)
+host_mem_usage 212152 # Number of bytes of host memory used
+host_seconds 9107.03 # Real time elapsed on the host
+host_tick_rate 63952564 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 1405604152 # Number of instructions simulated
sim_seconds 0.582418 # Number of seconds simulated
@@ -243,16 +243,16 @@ system.cpu.iew.iewIdleCycles 0 # Nu
system.cpu.iew.iewLSQFullEvents 8462 # Number of times the LSQ has become full, causing a stall
system.cpu.iew.iewSquashCycles 27885594 # Number of cycles IEW is squashing
system.cpu.iew.iewUnblockCycles 128708 # Number of cycles IEW is unblocking
-system.cpu.iew.lsq.thread.0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding
-system.cpu.iew.lsq.thread.0.cacheBlocked 40205 # Number of times an access to memory failed due to the cache being blocked
-system.cpu.iew.lsq.thread.0.forwLoads 129748862 # Number of loads that had data forwarded from stores
-system.cpu.iew.lsq.thread.0.ignoredResponses 35905 # Number of memory responses ignored because the instruction is squashed
-system.cpu.iew.lsq.thread.0.invAddrLoads 0 # Number of loads ignored due to an invalid address
-system.cpu.iew.lsq.thread.0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address
-system.cpu.iew.lsq.thread.0.memOrderViolation 460365 # Number of memory ordering violations
-system.cpu.iew.lsq.thread.0.rescheduledLoads 237 # Number of loads that were rescheduled
-system.cpu.iew.lsq.thread.0.squashedLoads 58644458 # Number of loads squashed
-system.cpu.iew.lsq.thread.0.squashedStores 20174020 # Number of stores squashed
+system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding
+system.cpu.iew.lsq.thread0.cacheBlocked 40205 # Number of times an access to memory failed due to the cache being blocked
+system.cpu.iew.lsq.thread0.forwLoads 129748862 # Number of loads that had data forwarded from stores
+system.cpu.iew.lsq.thread0.ignoredResponses 35905 # Number of memory responses ignored because the instruction is squashed
+system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
+system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address
+system.cpu.iew.lsq.thread0.memOrderViolation 460365 # Number of memory ordering violations
+system.cpu.iew.lsq.thread0.rescheduledLoads 237 # Number of loads that were rescheduled
+system.cpu.iew.lsq.thread0.squashedLoads 58644458 # Number of loads squashed
+system.cpu.iew.lsq.thread0.squashedStores 20174020 # Number of stores squashed
system.cpu.iew.memOrderViolationEvents 460365 # Number of memory order violations
system.cpu.iew.predictedNotTakenIncorrect 670427 # Number of branches that were predicted not taken incorrectly
system.cpu.iew.predictedTakenIncorrect 5004860 # Number of branches that were predicted taken incorrectly