21 files changed, 205 insertions, 33 deletions

diff --git a/tests/long/00.gzip/ref/alpha/linux/simple-timing/stderr b/tests/long/00.gzip/ref/alpha/linux/simple-timing/stderr
deleted file mode 100644
index 87866a2a5..000000000
--- a/tests/long/00.gzip/ref/alpha/linux/simple-timing/stderr
+++ /dev/null
@@ -1 +0,0 @@
-warn: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/00.gzip/ref/alpha/linux/o3-timing/config.ini b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
index b221360e2..fa5ac1725 100644
--- a/tests/long/00.gzip/ref/alpha/linux/o3-timing/config.ini
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini
@@ -388,7 +388,7 @@ port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cp
 [system.cpu.workload]
 type=LiveProcess
 cmd=gzip input.log 1
-cwd=build/ALPHA_SE/tests/opt/long/00.gzip/alpha/linux/o3-timing
+cwd=build/ALPHA_SE/tests/fast/long/00.gzip/alpha/linux/o3-timing
 egid=100
 env=
 euid=100
@@ -414,14 +414,6 @@ type=PhysicalMemory
 file=
 latency=1
 range=0:134217727
+zero=false
 port=system.membus.port[0]
 
-[trace]
-bufsize=0
-cycle=0
-dump_on_exit=false
-file=cout
-flags=
-ignore=
-start=0
-
diff --git a/tests/long/00.gzip/ref/alpha/linux/o3-timing/config.out b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.out
index 704fa2535..8744b6907 100644
--- a/tests/long/00.gzip/ref/alpha/linux/o3-timing/config.out
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.out
@@ -10,6 +10,7 @@ type=PhysicalMemory
 file=
 range=[0,134217727]
 latency=1
+zero=false
 
 [system]
 type=System
@@ -30,7 +31,7 @@ executable=/dist/m5/cpu2000/binaries/alpha/tru64/gzip
 input=cin
 output=cout
 env=
-cwd=build/ALPHA_SE/tests/opt/long/00.gzip/alpha/linux/o3-timing
+cwd=build/ALPHA_SE/tests/fast/long/00.gzip/alpha/linux/o3-timing
 system=system
 uid=100
 euid=100
@@ -366,15 +367,6 @@ clock=1000
 width=64
 responder_set=false
 
-[trace]
-flags=
-start=0
-cycle=0
-bufsize=0
-file=cout
-dump_on_exit=false
-ignore=
-
 [stats]
 descriptions=true
 project_name=test
@@ -392,9 +384,6 @@ dump_cycle=0
 dump_period=0
 ignore_events=
 
-[random]
-seed=1
-
 [exetrace]
 speculative=true
 print_cycle=true
diff --git a/tests/long/00.gzip/ref/alpha/linux/o3-timing/m5stats.txt b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt
index bd4e6c524..8303336ed 100644
--- a/tests/long/00.gzip/ref/alpha/linux/o3-timing/m5stats.txt
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt
@@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect                4270829                       # Nu
 global.BPredUnit.condPredicted              101462576                       # Number of conditional branches predicted
 global.BPredUnit.lookups                    108029652                       # Number of BP lookups
 global.BPredUnit.usedRAS                      1765818                       # Number of times the RAS was used to get a target.
-host_inst_rate                                  49266                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 315608                       # Number of bytes of host memory used
-host_seconds                                 11479.54                       # Real time elapsed on the host
-host_tick_rate                                 147031                       # Simulator tick rate (ticks/s)
+host_inst_rate                                  64442                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 296420                       # Number of bytes of host memory used
+host_seconds                                  8776.17                       # Real time elapsed on the host
+host_tick_rate                                 192322                       # Simulator tick rate (ticks/s)
 memdepunit.memDep.conflictingLoads           20975706                       # Number of conflicting loads.
 memdepunit.memDep.conflictingStores          18042230                       # Number of conflicting stores.
 memdepunit.memDep.insertedLoads             207074480                       # Number of loads inserted to the mem dependence unit.
@@ -263,8 +263,8 @@ system.cpu.iew.lsq.thread.0.rescheduledLoads         5548
 system.cpu.iew.lsq.thread.0.squashedLoads     92024970                       # Number of loads squashed
 system.cpu.iew.lsq.thread.0.squashedStores     17250597                       # Number of stores squashed
 system.cpu.iew.memOrderViolationEvents           1892                       # Number of memory order violations
-system.cpu.iew.predictedNotTakenIncorrect      2705247                       # Number of branches that were predicted not taken incorrectly
-system.cpu.iew.predictedTakenIncorrect        2033271                       # Number of branches that were predicted taken incorrectly
+system.cpu.iew.predictedNotTakenIncorrect       530187                       # Number of branches that were predicted not taken incorrectly
+system.cpu.iew.predictedTakenIncorrect        4208331                       # Number of branches that were predicted taken incorrectly
 system.cpu.ipc                               0.335073                       # IPC: Instructions Per Cycle
 system.cpu.ipc_total                         0.335073                       # IPC: Total IPC of All Threads
 system.cpu.iq.ISSUE:FU_type_0               752715877                       # Type of FU issued
@@ -335,8 +335,8 @@ system.cpu.l2cache.ReadReq_misses               26319                       # nu
 system.cpu.l2cache.ReadReq_mshr_miss_latency     58461984                       # number of ReadReq MSHR miss cycles
 system.cpu.l2cache.ReadReq_mshr_miss_rate     0.054654                       # mshr miss rate for ReadReq accesses
 system.cpu.l2cache.ReadReq_mshr_misses          26319                       # number of ReadReq MSHR misses
-system.cpu.l2cache.WriteReqNoAck|Writeback_accesses       337990                       # number of WriteReqNoAck|Writeback accesses(hits+misses)
-system.cpu.l2cache.WriteReqNoAck|Writeback_hits       337990                       # number of WriteReqNoAck|Writeback hits
+system.cpu.l2cache.Writeback_accesses          337990                       # number of Writeback accesses(hits+misses)
+system.cpu.l2cache.Writeback_hits              337990                       # number of Writeback hits
 system.cpu.l2cache.avg_blocked_cycles_no_mshrs <err: div-0>                       # average number of cycles each access was blocked
 system.cpu.l2cache.avg_blocked_cycles_no_targets <err: div-0>                       # average number of cycles each access was blocked
 system.cpu.l2cache.avg_refs                 30.138911                       # Average number of references to valid blocks.
@@ -362,7 +362,7 @@ system.cpu.l2cache.no_allocate_misses               0                       # Nu
 system.cpu.l2cache.overall_accesses            819545                       # number of overall (read+write) accesses
 system.cpu.l2cache.overall_avg_miss_latency  6806.870170                       # average overall miss latency
 system.cpu.l2cache.overall_avg_mshr_miss_latency  2221.284395                       # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_uncacheable_latency     no value                       # average overall mshr uncacheable latency
+system.cpu.l2cache.overall_avg_mshr_uncacheable_latency <err: div-0>                       # average overall mshr uncacheable latency
 system.cpu.l2cache.overall_hits                793226                       # number of overall hits
 system.cpu.l2cache.overall_miss_latency     179150016                       # number of overall miss cycles
 system.cpu.l2cache.overall_miss_rate         0.032114                       # miss rate for overall accesses
diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr
new file mode 100644
index 000000000..eb1796ead
--- /dev/null
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr
@@ -0,0 +1,2 @@
+0: system.remote_gdb.listener: listening for remote gdb on port 7000
+warn: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/00.gzip/ref/alpha/linux/o3-timing/stdout b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stdout
index 9aaca3eeb..9aaca3eeb 100644
--- a/tests/long/00.gzip/ref/alpha/linux/o3-timing/stdout
+++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stdout
diff --git a/tests/long/00.gzip/ref/alpha/linux/simple-atomic/config.ini b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
index 841e8766f..841e8766f 100644
--- a/tests/long/00.gzip/ref/alpha/linux/simple-atomic/config.ini
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
diff --git a/tests/long/00.gzip/ref/alpha/linux/simple-atomic/config.out b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.out
index b5a24e5fb..b5a24e5fb 100644
--- a/tests/long/00.gzip/ref/alpha/linux/simple-atomic/config.out
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.out
diff --git a/tests/long/00.gzip/ref/alpha/linux/simple-atomic/m5stats.txt b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/m5stats.txt
index b8593d3a3..b8593d3a3 100644
--- a/tests/long/00.gzip/ref/alpha/linux/simple-atomic/m5stats.txt
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/m5stats.txt
diff --git a/tests/long/00.gzip/ref/alpha/linux/o3-timing/stderr b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stderr
index 87866a2a5..87866a2a5 100644
--- a/tests/long/00.gzip/ref/alpha/linux/o3-timing/stderr
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stderr
diff --git a/tests/long/00.gzip/ref/alpha/linux/simple-atomic/stdout b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stdout
index 9aaca3eeb..9aaca3eeb 100644
--- a/tests/long/00.gzip/ref/alpha/linux/simple-atomic/stdout
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stdout
diff --git a/tests/long/00.gzip/ref/alpha/linux/simple-timing/config.ini b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini
index 48a760b08..48a760b08 100644
--- a/tests/long/00.gzip/ref/alpha/linux/simple-timing/config.ini
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini
diff --git a/tests/long/00.gzip/ref/alpha/linux/simple-timing/config.out b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.out
index eddb9ff53..eddb9ff53 100644
--- a/tests/long/00.gzip/ref/alpha/linux/simple-timing/config.out
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.out
diff --git a/tests/long/00.gzip/ref/alpha/linux/simple-timing/m5stats.txt b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt
index 5e7441c54..5e7441c54 100644
--- a/tests/long/00.gzip/ref/alpha/linux/simple-timing/m5stats.txt
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt
diff --git a/tests/long/00.gzip/ref/alpha/linux/simple-atomic/stderr b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stderr
index 87866a2a5..87866a2a5 100644
--- a/tests/long/00.gzip/ref/alpha/linux/simple-atomic/stderr
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stderr
diff --git a/tests/long/00.gzip/ref/alpha/linux/simple-timing/stdout b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stdout
index 9aaca3eeb..9aaca3eeb 100644
--- a/tests/long/00.gzip/ref/alpha/linux/simple-timing/stdout
+++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stdout
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
new file mode 100644
index 000000000..1cf7e8a9b
--- /dev/null
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini
@@ -0,0 +1,64 @@
+[root]
+type=Root
+children=system
+dummy=0
+
+[system]
+type=System
+children=cpu membus physmem
+mem_mode=atomic
+physmem=system.physmem
+
+[system.cpu]
+type=AtomicSimpleCPU
+children=workload
+clock=1
+cpu_id=0
+defer_registration=false
+function_trace=false
+function_trace_start=0
+max_insts_all_threads=0
+max_insts_any_thread=0
+max_loads_all_threads=0
+max_loads_any_thread=0
+phase=0
+progress_interval=0
+simulate_stalls=false
+system=system
+width=1
+workload=system.cpu.workload
+dcache_port=system.membus.port[2]
+icache_port=system.membus.port[1]
+
+[system.cpu.workload]
+type=LiveProcess
+cmd=gzip input.log 1
+cwd=build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic
+egid=100
+env=
+euid=100
+executable=/dist/m5/cpu2000/binaries/sparc/linux/gzip
+gid=100
+input=cin
+output=cout
+pid=100
+ppid=99
+system=system
+uid=100
+
+[system.membus]
+type=Bus
+bus_id=0
+clock=1000
+responder_set=false
+width=64
+port=system.physmem.port system.cpu.icache_port system.cpu.dcache_port
+
+[system.physmem]
+type=PhysicalMemory
+file=
+latency=1
+range=0:134217727
+zero=false
+port=system.membus.port[0]
+
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.out b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.out
new file mode 100644
index 000000000..f6ace951d
--- /dev/null
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.out
@@ -0,0 +1,57 @@
+[root]
+type=Root
+dummy=0
+
+[system.physmem]
+type=PhysicalMemory
+file=
+range=[0,134217727]
+latency=1
+zero=false
+
+[system]
+type=System
+physmem=system.physmem
+mem_mode=atomic
+
+[system.membus]
+type=Bus
+bus_id=0
+clock=1000
+width=64
+responder_set=false
+
+[system.cpu.workload]
+type=LiveProcess
+cmd=gzip input.log 1
+executable=/dist/m5/cpu2000/binaries/sparc/linux/gzip
+input=cin
+output=cout
+env=
+cwd=build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic
+system=system
+uid=100
+euid=100
+gid=100
+egid=100
+pid=100
+ppid=99
+
+[system.cpu]
+type=AtomicSimpleCPU
+max_insts_any_thread=0
+max_insts_all_threads=0
+max_loads_any_thread=0
+max_loads_all_threads=0
+progress_interval=0
+system=system
+cpu_id=0
+workload=system.cpu.workload
+clock=1
+phase=0
+defer_registration=false
+width=1
+function_trace=false
+function_trace_start=0
+simulate_stalls=false
+
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/m5stats.txt b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/m5stats.txt
new file mode 100644
index 000000000..6cf88af9d
--- /dev/null
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/m5stats.txt
@@ -0,0 +1,18 @@
+
+---------- Begin Simulation Statistics ----------
+host_inst_rate                                 713136                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 148308                       # Number of bytes of host memory used
+host_seconds                                  2088.68                       # Real time elapsed on the host
+host_tick_rate                                 713136                       # Simulator tick rate (ticks/s)
+sim_freq                                 1000000000000                       # Frequency of simulated ticks
+sim_insts                                  1489514860                       # Number of instructions simulated
+sim_seconds                                  0.001490                       # Number of seconds simulated
+sim_ticks                                  1489514859                       # Number of ticks simulated
+system.cpu.idle_fraction                            0                       # Percentage of idle cycles
+system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
+system.cpu.numCycles                       1489514860                       # number of cpu cycles simulated
+system.cpu.num_insts                       1489514860                       # Number of instructions executed
+system.cpu.num_refs                         569359656                       # Number of memory references
+system.cpu.workload.PROG:num_syscalls              19                       # Number of system calls
+
+---------- End Simulation Statistics   ----------
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr
new file mode 100644
index 000000000..e74a68c71
--- /dev/null
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr
@@ -0,0 +1,7 @@
+warn: More than two loadable segments in ELF object.
+warn: Ignoring segment @ 0xb4000 length 0x10.
+warn: More than two loadable segments in ELF object.
+warn: Ignoring segment @ 0x0 length 0x0.
+0: system.remote_gdb.listener: listening for remote gdb on port 7000
+warn: Entering event queue @ 0.  Starting simulation...
+warn: Ignoring request to flush register windows.
diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout
new file mode 100644
index 000000000..3f5dab90b
--- /dev/null
+++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout
@@ -0,0 +1,44 @@
+spec_init
+Loading Input Data
+Duplicating 262144 bytes
+Duplicating 524288 bytes
+Input data 1048576 bytes in length
+Compressing Input Data, level 1
+Compressed data 108074 bytes in length
+Uncompressing Data
+Uncompressed data 1048576 bytes in length
+Uncompressed data compared correctly
+Compressing Input Data, level 3
+Compressed data 97831 bytes in length
+Uncompressing Data
+Uncompressed data 1048576 bytes in length
+Uncompressed data compared correctly
+Compressing Input Data, level 5
+Compressed data 83382 bytes in length
+Uncompressing Data
+Uncompressed data 1048576 bytes in length
+Uncompressed data compared correctly
+Compressing Input Data, level 7
+Compressed data 76606 bytes in length
+Uncompressing Data
+Uncompressed data 1048576 bytes in length
+Uncompressed data compared correctly
+Compressing Input Data, level 9
+Compressed data 73189 bytes in length
+Uncompressing Data
+Uncompressed data 1048576 bytes in length
+Uncompressed data compared correctly
+Tested 1MB buffer: OK!
+M5 Simulator System
+
+Copyright (c) 2001-2006
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Mar 21 2007 00:46:54
+M5 started Wed Mar 21 00:47:20 2007
+M5 executing on zizzer.eecs.umich.edu
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic tests/run.py long/00.gzip/sparc/linux/simple-atomic
+Global frequency set at 1000000000000 ticks per second
+Exiting @ tick 1489514859 because target called exit()