diff options
Diffstat (limited to 'tests/long/00.gzip/ref')
21 files changed, 85 insertions, 100 deletions
diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini index a28c57257..96f36a5ca 100644 --- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini @@ -104,11 +104,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -277,11 +276,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -313,11 +311,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -356,12 +353,12 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=gzip input.log 1 -cwd=build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/o3-timing +cwd=build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/o3-timing egid=100 env= errout=cerr euid=100 -executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/gzip +executable=/dist/m5/cpu2000/binaries/alpha/tru64/gzip gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout index 45435b4fd..9ba264ef1 100755 --- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 14 2009 23:40:03 -M5 revision 4208b24ee3ad 6033 default qtip tip new-thread-status-stats-update -M5 started Apr 14 2009 23:40:05 -M5 executing on phenom -command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/00.gzip/alpha/tru64/o3-timing +M5 compiled Apr 21 2009 16:38:39 +M5 revision e6dd09514462 6117 default qtip tip stats-update +M5 started Apr 21 2009 17:09:58 +M5 executing on zizzer +command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. diff --git a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt index 5e89094d1..090a41f44 100644 --- a/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 252050 # Simulator instruction rate (inst/s) -host_mem_usage 207828 # Number of bytes of host memory used -host_seconds 2243.81 # Real time elapsed on the host -host_tick_rate 74461791 # Simulator tick rate (ticks/s) +host_inst_rate 211142 # Simulator instruction rate (inst/s) +host_mem_usage 204372 # Number of bytes of host memory used +host_seconds 2678.54 # Real time elapsed on the host +host_tick_rate 62376647 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 565552443 # Number of instructions simulated sim_seconds 0.167078 # Number of seconds simulated diff --git a/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simout b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simout index 512d13649..760b4567a 100755 --- a/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simout +++ b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 8 2009 12:30:02 -M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff -M5 started Apr 8 2009 12:34:49 -M5 executing on maize +M5 compiled Apr 21 2009 16:38:39 +M5 revision e6dd09514462 6117 default qtip tip stats-update +M5 started Apr 21 2009 16:39:08 +M5 executing on zizzer command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt index aa16ad6b4..ecc08006d 100644 --- a/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt +++ b/tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 5975527 # Simulator instruction rate (inst/s) -host_mem_usage 197448 # Number of bytes of host memory used -host_seconds 100.72 # Real time elapsed on the host -host_tick_rate 2987780856 # Simulator tick rate (ticks/s) +host_inst_rate 3845310 # Simulator instruction rate (inst/s) +host_mem_usage 195720 # Number of bytes of host memory used +host_seconds 156.52 # Real time elapsed on the host +host_tick_rate 1922667398 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 601856964 # Number of instructions simulated sim_seconds 0.300931 # Number of seconds simulated diff --git a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini index b0f992d6d..014dd0eae 100644 --- a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini @@ -40,11 +40,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -76,11 +75,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -112,11 +110,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=10000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false diff --git a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/simout b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/simout index 20994514f..3f5339a48 100755 --- a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/simout +++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 8 2009 12:30:02 -M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff -M5 started Apr 8 2009 12:34:42 -M5 executing on maize +M5 compiled Apr 21 2009 16:38:39 +M5 revision e6dd09514462 6117 default qtip tip stats-update +M5 started Apr 21 2009 17:10:28 +M5 executing on zizzer command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/simple-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/00.gzip/alpha/tru64/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stats.txt index d4bd93848..c10711f5d 100644 --- a/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stats.txt +++ b/tests/long/00.gzip/ref/alpha/tru64/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 3011769 # Simulator instruction rate (inst/s) -host_mem_usage 204988 # Number of bytes of host memory used -host_seconds 199.84 # Real time elapsed on the host -host_tick_rate 3893225431 # Simulator tick rate (ticks/s) +host_inst_rate 1860782 # Simulator instruction rate (inst/s) +host_mem_usage 203344 # Number of bytes of host memory used +host_seconds 323.44 # Real time elapsed on the host +host_tick_rate 2405379783 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 601856964 # Number of instructions simulated sim_seconds 0.778004 # Number of seconds simulated diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini b/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini index 4fb648418..b155134f9 100644 --- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini +++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini @@ -104,11 +104,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -277,11 +276,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -313,11 +311,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -356,12 +353,12 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=gzip input.log 1 -cwd=build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing +cwd=build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/o3-timing egid=100 env= errout=cerr euid=100 -executable=/home/stever/m5/dist/cpu2000/binaries/sparc/linux/gzip +executable=/dist/m5/cpu2000/binaries/sparc/linux/gzip gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout b/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout index 6ef7c085b..42dccffd2 100755 --- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout +++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 14 2009 21:09:22 -M5 revision 4208b24ee3ad 6033 default qtip tip new-thread-status-stats-update -M5 started Apr 14 2009 23:40:01 -M5 executing on phenom -command line: build/SPARC_SE/m5.opt -d build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing +M5 compiled Apr 21 2009 18:04:32 +M5 revision e6dd09514462 6117 default qtip tip stats-update +M5 started Apr 21 2009 18:17:54 +M5 executing on zizzer +command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... spec_init diff --git a/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt b/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt index cec6a0403..7ce31fb30 100644 --- a/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt +++ b/tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 120324 # Simulator instruction rate (inst/s) -host_mem_usage 213384 # Number of bytes of host memory used -host_seconds 11681.98 # Real time elapsed on the host -host_tick_rate 94389741 # Simulator tick rate (ticks/s) +host_inst_rate 110757 # Simulator instruction rate (inst/s) +host_mem_usage 206360 # Number of bytes of host memory used +host_seconds 12690.99 # Real time elapsed on the host +host_tick_rate 86885218 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1405618365 # Number of instructions simulated sim_seconds 1.102659 # Number of seconds simulated diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout index 2a36b7985..c6ea04920 100755 --- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout +++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 8 2009 12:30:02 -M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff -M5 started Apr 8 2009 12:31:00 -M5 executing on maize +M5 compiled Apr 21 2009 18:04:32 +M5 revision e6dd09514462 6117 default qtip tip stats-update +M5 started Apr 21 2009 18:04:58 +M5 executing on zizzer command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt index 077429fb4..99ed606e5 100644 --- a/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt +++ b/tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 3659022 # Simulator instruction rate (inst/s) -host_mem_usage 199544 # Number of bytes of host memory used -host_seconds 407.08 # Real time elapsed on the host -host_tick_rate 1829515892 # Simulator tick rate (ticks/s) +host_inst_rate 2585505 # Simulator instruction rate (inst/s) +host_mem_usage 197792 # Number of bytes of host memory used +host_seconds 576.11 # Real time elapsed on the host +host_tick_rate 1292756549 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1489523295 # Number of instructions simulated sim_seconds 0.744764 # Number of seconds simulated diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini b/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini index 7de5a10fa..2b302db2e 100644 --- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini +++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini @@ -40,11 +40,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -76,11 +75,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -112,11 +110,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=10000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-timing/simout b/tests/long/00.gzip/ref/sparc/linux/simple-timing/simout index 73072ad1d..87c6b0d93 100755 --- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/simout +++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 8 2009 12:30:02 -M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff -M5 started Apr 8 2009 12:32:24 -M5 executing on maize +M5 compiled Apr 21 2009 18:04:32 +M5 revision e6dd09514462 6117 default qtip tip stats-update +M5 started Apr 21 2009 18:13:21 +M5 executing on zizzer command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/fast/long/00.gzip/sparc/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt b/tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt index f480451f2..2bdd6d4c0 100644 --- a/tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt +++ b/tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1898996 # Simulator instruction rate (inst/s) -host_mem_usage 207084 # Number of bytes of host memory used -host_seconds 784.37 # Real time elapsed on the host -host_tick_rate 2646697045 # Simulator tick rate (ticks/s) +host_inst_rate 1263053 # Simulator instruction rate (inst/s) +host_mem_usage 205412 # Number of bytes of host memory used +host_seconds 1179.30 # Real time elapsed on the host +host_tick_rate 1760361196 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1489523295 # Number of instructions simulated sim_seconds 2.076001 # Number of seconds simulated diff --git a/tests/long/00.gzip/ref/x86/linux/simple-atomic/simout b/tests/long/00.gzip/ref/x86/linux/simple-atomic/simout index 7edeeca7b..86ee4acee 100755 --- a/tests/long/00.gzip/ref/x86/linux/simple-atomic/simout +++ b/tests/long/00.gzip/ref/x86/linux/simple-atomic/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 12 2009 13:26:17 -M5 revision 8c874c02878a 6042 default qtip tip cpuidfixstats.patch -M5 started Apr 12 2009 13:32:20 -M5 executing on tater +M5 compiled Apr 21 2009 19:00:07 +M5 revision e6dd09514462 6117 default qtip tip stats-update +M5 started Apr 21 2009 19:00:32 +M5 executing on zizzer command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/00.gzip/x86/linux/simple-atomic -re tests/run.py build/X86_SE/tests/fast/long/00.gzip/x86/linux/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/00.gzip/ref/x86/linux/simple-atomic/stats.txt b/tests/long/00.gzip/ref/x86/linux/simple-atomic/stats.txt index 47ae4ef00..f2c9a60d4 100644 --- a/tests/long/00.gzip/ref/x86/linux/simple-atomic/stats.txt +++ b/tests/long/00.gzip/ref/x86/linux/simple-atomic/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1453243 # Simulator instruction rate (inst/s) -host_mem_usage 197380 # Number of bytes of host memory used -host_seconds 1114.31 # Real time elapsed on the host -host_tick_rate 864146267 # Simulator tick rate (ticks/s) +host_inst_rate 2698152 # Simulator instruction rate (inst/s) +host_mem_usage 198060 # Number of bytes of host memory used +host_seconds 600.18 # Real time elapsed on the host +host_tick_rate 1604410387 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1619365954 # Number of instructions simulated sim_seconds 0.962929 # Number of seconds simulated diff --git a/tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini b/tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini index 3764c63b0..033ea4c68 100644 --- a/tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini +++ b/tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini @@ -40,11 +40,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -76,11 +75,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=1000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false @@ -112,11 +110,10 @@ type=BaseCache addr_range=0:18446744073709551615 assoc=2 block_size=64 -cpu_side_filter_ranges= +forward_snoops=true hash_delay=1 latency=10000 max_miss_count=0 -mem_side_filter_ranges= mshrs=10 prefetch_cache_check_push=true prefetch_data_accesses_only=false diff --git a/tests/long/00.gzip/ref/x86/linux/simple-timing/simout b/tests/long/00.gzip/ref/x86/linux/simple-timing/simout index 6282dd2c2..852b3d501 100755 --- a/tests/long/00.gzip/ref/x86/linux/simple-timing/simout +++ b/tests/long/00.gzip/ref/x86/linux/simple-timing/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 12 2009 13:26:17 -M5 revision 8c874c02878a 6042 default qtip tip cpuidfixstats.patch -M5 started Apr 12 2009 13:31:26 -M5 executing on tater +M5 compiled Apr 21 2009 19:00:07 +M5 revision e6dd09514462 6117 default qtip tip stats-update +M5 started Apr 21 2009 19:10:33 +M5 executing on zizzer command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/00.gzip/x86/linux/simple-timing -re tests/run.py build/X86_SE/tests/fast/long/00.gzip/x86/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/00.gzip/ref/x86/linux/simple-timing/stats.txt b/tests/long/00.gzip/ref/x86/linux/simple-timing/stats.txt index fd5733aad..88ced5522 100644 --- a/tests/long/00.gzip/ref/x86/linux/simple-timing/stats.txt +++ b/tests/long/00.gzip/ref/x86/linux/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 995738 # Simulator instruction rate (inst/s) -host_mem_usage 205000 # Number of bytes of host memory used -host_seconds 1626.30 # Real time elapsed on the host -host_tick_rate 1115968300 # Simulator tick rate (ticks/s) +host_inst_rate 1809758 # Simulator instruction rate (inst/s) +host_mem_usage 205688 # Number of bytes of host memory used +host_seconds 894.80 # Real time elapsed on the host +host_tick_rate 2028277640 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1619365954 # Number of instructions simulated sim_seconds 1.814897 # Number of seconds simulated |