diff options
Diffstat (limited to 'tests/long/00.gzip')
| -rw-r--r-- | tests/long/00.gzip/ref/arm/linux/o3-timing/config.ini | 2 | ||||
| -rwxr-xr-x | tests/long/00.gzip/ref/arm/linux/o3-timing/simout | 8 | ||||
| -rw-r--r-- | tests/long/00.gzip/ref/arm/linux/o3-timing/stats.txt | 32 |
3 files changed, 21 insertions, 21 deletions
diff --git a/tests/long/00.gzip/ref/arm/linux/o3-timing/config.ini b/tests/long/00.gzip/ref/arm/linux/o3-timing/config.ini index b2393d69d..12a85f3ff 100644 --- a/tests/long/00.gzip/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/00.gzip/ref/arm/linux/o3-timing/config.ini @@ -493,7 +493,7 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/cpu2000/binaries/arm/linux/gzip +executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/gzip gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/00.gzip/ref/arm/linux/o3-timing/simout b/tests/long/00.gzip/ref/arm/linux/o3-timing/simout index 3549187ab..1244f3aca 100755 --- a/tests/long/00.gzip/ref/arm/linux/o3-timing/simout +++ b/tests/long/00.gzip/ref/arm/linux/o3-timing/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Feb 21 2011 14:34:16 -M5 revision b06fecbc6572 7972 default qtip tip ext/print_mem_more.patch -M5 started Feb 21 2011 14:34:24 +M5 compiled Feb 22 2011 10:22:27 +M5 revision c70e4f3301ed 7980 default ext/rfe_stats_updates.patch qtip tip +M5 started Feb 22 2011 10:22:49 M5 executing on u200439-lin.austin.arm.com -command line: build/ARM_SE/m5.opt -d build/ARM_SE/tests/opt/long/00.gzip/arm/linux/o3-timing -re tests/run.py build/ARM_SE/tests/opt/long/00.gzip/arm/linux/o3-timing +command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/00.gzip/arm/linux/o3-timing -re tests/run.py build/ARM_SE/tests/fast/long/00.gzip/arm/linux/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... spec_init diff --git a/tests/long/00.gzip/ref/arm/linux/o3-timing/stats.txt b/tests/long/00.gzip/ref/arm/linux/o3-timing/stats.txt index 70c39bd1c..7e719ad32 100644 --- a/tests/long/00.gzip/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/00.gzip/ref/arm/linux/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 84615 # Simulator instruction rate (inst/s) -host_mem_usage 256696 # Number of bytes of host memory used -host_seconds 7097.77 # Real time elapsed on the host -host_tick_rate 30571310 # Simulator tick rate (ticks/s) +host_inst_rate 123576 # Simulator instruction rate (inst/s) +host_mem_usage 255024 # Number of bytes of host memory used +host_seconds 4860.01 # Real time elapsed on the host +host_tick_rate 44647688 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 600581343 # Number of instructions simulated sim_seconds 0.216988 # Number of seconds simulated @@ -119,9 +119,9 @@ system.cpu.dcache.tagsinuse 4094.932523 # Cy system.cpu.dcache.total_refs 208054728 # Total number of references to valid blocks. system.cpu.dcache.warmup_cycle 90723000 # Cycle when the warmup percentage was hit. system.cpu.dcache.writebacks 394050 # number of writebacks -system.cpu.decode.DECODE:BlockedCycles 84141897 # Number of cycles decode is blocked -system.cpu.decode.DECODE:DecodedInsts 763381678 # Number of instructions handled by decode -system.cpu.decode.DECODE:IdleCycles 172755507 # Number of cycles decode is idle +system.cpu.decode.DECODE:BlockedCycles 84141899 # Number of cycles decode is blocked +system.cpu.decode.DECODE:DecodedInsts 763381679 # Number of instructions handled by decode +system.cpu.decode.DECODE:IdleCycles 172755505 # Number of cycles decode is idle system.cpu.decode.DECODE:RunCycles 145178933 # Number of cycles decode is running system.cpu.decode.DECODE:SquashCycles 17467706 # Number of cycles decode is squashing system.cpu.decode.DECODE:UnblockCycles 13550939 # Number of cycles decode is unblocking @@ -165,8 +165,8 @@ system.cpu.fetch.rateDist::0 271374463 62.66% 62.66% # Nu system.cpu.fetch.rateDist::1 26620223 6.15% 68.81% # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::2 18536414 4.28% 73.09% # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::3 23464508 5.42% 78.50% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::4 11465886 2.65% 81.15% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::5 12676535 2.93% 84.08% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::4 11465885 2.65% 81.15% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::5 12676536 2.93% 84.08% # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::6 5122176 1.18% 85.26% # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::7 7816549 1.80% 87.07% # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::8 56018228 12.93% 100.00% # Number of instructions fetched each cycle (Total) @@ -492,22 +492,22 @@ system.cpu.numWorkItemsStarted 0 # nu system.cpu.rename.RENAME:BlockCycles 12394449 # Number of cycles rename is blocking system.cpu.rename.RENAME:CommittedMaps 469246940 # Number of HB maps that are committed system.cpu.rename.RENAME:IQFullEvents 63310870 # Number of times rename has blocked due to IQ full -system.cpu.rename.RENAME:IdleCycles 190431449 # Number of cycles rename is idle +system.cpu.rename.RENAME:IdleCycles 190431447 # Number of cycles rename is idle system.cpu.rename.RENAME:LSQFullEvents 3181742 # Number of times rename has blocked due to LSQ full system.cpu.rename.RENAME:ROBFullEvents 1 # Number of times rename has blocked due to ROB full -system.cpu.rename.RENAME:RenameLookups 2146129409 # Number of register rename lookups that rename has made +system.cpu.rename.RENAME:RenameLookups 2146129408 # Number of register rename lookups that rename has made system.cpu.rename.RENAME:RenamedInsts 749361548 # Number of instructions processed by rename -system.cpu.rename.RENAME:RenamedOperands 579635255 # Number of destination operands rename has renamed +system.cpu.rename.RENAME:RenamedOperands 579635256 # Number of destination operands rename has renamed system.cpu.rename.RENAME:RunCycles 140764920 # Number of cycles rename is running system.cpu.rename.RENAME:SquashCycles 17467706 # Number of cycles rename is squashing system.cpu.rename.RENAME:UnblockCycles 71980154 # Number of cycles rename is unblocking -system.cpu.rename.RENAME:UndoneMaps 110388312 # Number of HB maps that are undone due to squashing +system.cpu.rename.RENAME:UndoneMaps 110388313 # Number of HB maps that are undone due to squashing system.cpu.rename.RENAME:fp_rename_lookups 96 # Number of floating rename lookups -system.cpu.rename.RENAME:int_rename_lookups 2146129313 # Number of integer rename lookups -system.cpu.rename.RENAME:serializeStallCycles 56304 # count of cycles rename stalled for serializing inst +system.cpu.rename.RENAME:int_rename_lookups 2146129312 # Number of integer rename lookups +system.cpu.rename.RENAME:serializeStallCycles 56306 # count of cycles rename stalled for serializing inst system.cpu.rename.RENAME:serializingInsts 3959 # count of serializing insts renamed system.cpu.rename.RENAME:skidInsts 128598458 # count of insts added to the skid buffer -system.cpu.rename.RENAME:tempSerializingInsts 3953 # count of temporary serializing insts renamed +system.cpu.rename.RENAME:tempSerializingInsts 3954 # count of temporary serializing insts renamed system.cpu.rob.rob_reads 1130320351 # The number of ROB reads system.cpu.rob.rob_writes 1461345715 # The number of ROB writes system.cpu.timesIdled 36569 # Number of times that the entire CPU went into an idle state and unscheduled itself |