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-rw-r--r--tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini17
-rwxr-xr-xtests/long/10.mcf/ref/arm/linux/simple-atomic/simout10
-rw-r--r--tests/long/10.mcf/ref/arm/linux/simple-atomic/stats.txt26
3 files changed, 39 insertions, 14 deletions
diff --git a/tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini b/tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini
index bfff6943f..a584d29ed 100644
--- a/tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini
+++ b/tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini
@@ -1,13 +1,22 @@
[root]
type=Root
children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
[system]
type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
[system.cpu]
type=AtomicSimpleCPU
@@ -52,14 +61,14 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=mcf mcf.in
-cwd=build/ARM_SE/tests/opt/long/10.mcf/arm/linux/simple-atomic
+cwd=build/ARM_SE/tests/fast/long/10.mcf/arm/linux/simple-atomic
egid=100
env=
errout=cerr
euid=100
-executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/mcf
+executable=/dist/m5/cpu2000/binaries/arm/linux/mcf
gid=100
-input=/chips/pd/randd/dist/cpu2000/data/mcf/smred/input/mcf.in
+input=/dist/m5/cpu2000/data/mcf/smred/input/mcf.in
max_stack_size=67108864
output=cout
pid=100
diff --git a/tests/long/10.mcf/ref/arm/linux/simple-atomic/simout b/tests/long/10.mcf/ref/arm/linux/simple-atomic/simout
index d622d0388..34dd3ff53 100755
--- a/tests/long/10.mcf/ref/arm/linux/simple-atomic/simout
+++ b/tests/long/10.mcf/ref/arm/linux/simple-atomic/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Oct 11 2010 18:37:23
-M5 revision c4e3d74d9a68 7726 default ext/mp_boot.patch qtip tip
-M5 started Oct 11 2010 18:40:32
-M5 executing on aus-bc3-b4
-command line: build/ARM_SE/m5.opt -d build/ARM_SE/tests/opt/long/10.mcf/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/opt/long/10.mcf/arm/linux/simple-atomic
+M5 compiled Feb 7 2011 01:56:16
+M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
+M5 started Feb 7 2011 01:56:24
+M5 executing on burrito
+command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/10.mcf/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/fast/long/10.mcf/arm/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.mcf/ref/arm/linux/simple-atomic/stats.txt b/tests/long/10.mcf/ref/arm/linux/simple-atomic/stats.txt
index 9bb34897d..0d4b35c47 100644
--- a/tests/long/10.mcf/ref/arm/linux/simple-atomic/stats.txt
+++ b/tests/long/10.mcf/ref/arm/linux/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 2560594 # Simulator instruction rate (inst/s)
-host_mem_usage 386656 # Number of bytes of host memory used
-host_seconds 35.62 # Real time elapsed on the host
-host_tick_rate 1522136495 # Simulator tick rate (ticks/s)
+host_inst_rate 937948 # Simulator instruction rate (inst/s)
+host_mem_usage 362060 # Number of bytes of host memory used
+host_seconds 97.24 # Real time elapsed on the host
+host_tick_rate 557562760 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 91202735 # Number of instructions simulated
sim_seconds 0.054216 # Number of seconds simulated
@@ -53,8 +53,24 @@ system.cpu.itb.write_hits 0 # DT
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 108431099 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu.num_busy_cycles 108431099 # Number of busy cycles
+system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls
+system.cpu.num_fp_alu_accesses 48 # Number of float alu accesses
+system.cpu.num_fp_insts 48 # number of float instructions
+system.cpu.num_fp_register_reads 54 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 30 # number of times the floating registers were written
+system.cpu.num_func_calls 0 # number of times a function call or return occured
+system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 91202735 # Number of instructions executed
-system.cpu.num_refs 27330336 # Number of memory references
+system.cpu.num_int_alu_accesses 72483223 # Number of integer alu accesses
+system.cpu.num_int_insts 72483223 # number of integer instructions
+system.cpu.num_int_register_reads 234567931 # number of times the integer registers were read
+system.cpu.num_int_register_writes 72546720 # number of times the integer registers were written
+system.cpu.num_load_insts 22585492 # Number of load instructions
+system.cpu.num_mem_refs 27330336 # number of memory refs
+system.cpu.num_store_insts 4744844 # Number of store instructions
system.cpu.workload.PROG:num_syscalls 442 # Number of system calls
---------- End Simulation Statistics ----------