diff options
Diffstat (limited to 'tests/long/10.mcf/ref/arm/linux/simple-timing/stats.txt')
| -rw-r--r-- | tests/long/10.mcf/ref/arm/linux/simple-timing/stats.txt | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/tests/long/10.mcf/ref/arm/linux/simple-timing/stats.txt b/tests/long/10.mcf/ref/arm/linux/simple-timing/stats.txt index ae84c8f2c..4acab86d6 100644 --- a/tests/long/10.mcf/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/10.mcf/ref/arm/linux/simple-timing/stats.txt @@ -1,11 +1,11 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1187634 # Simulator instruction rate (inst/s) -host_mem_usage 338364 # Number of bytes of host memory used -host_seconds 76.72 # Real time elapsed on the host -host_tick_rate 1983393949 # Simulator tick rate (ticks/s) +host_inst_rate 1413696 # Simulator instruction rate (inst/s) +host_mem_usage 343480 # Number of bytes of host memory used +host_seconds 64.50 # Real time elapsed on the host +host_tick_rate 2359219725 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks -sim_insts 91110245 # Number of instructions simulated +sim_insts 91176087 # Number of instructions simulated sim_seconds 0.152158 # Number of seconds simulated sim_ticks 152158072000 # Number of ticks simulated system.cpu.dcache.ReadReq_accesses 22564820 # number of ReadReq accesses(hits+misses) @@ -226,7 +226,7 @@ system.cpu.l2cache.warmup_cycle 0 # Cy system.cpu.l2cache.writebacks 35 # number of writebacks system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 304316144 # number of cpu cycles simulated -system.cpu.num_insts 91110245 # Number of instructions executed +system.cpu.num_insts 91176087 # Number of instructions executed system.cpu.num_refs 27330336 # Number of memory references system.cpu.workload.PROG:num_syscalls 442 # Number of system calls |