diff options
Diffstat (limited to 'tests/long/10.mcf/ref/sparc')
6 files changed, 76 insertions, 26 deletions
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini index 06fed5d59..164664341 100644 --- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini +++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini @@ -1,13 +1,22 @@ [root] type=Root children=system -dummy=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 [system] type=System children=cpu membus physmem mem_mode=atomic physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu] type=AtomicSimpleCPU @@ -57,9 +66,9 @@ egid=100 env= errout=cerr euid=100 -executable=/proj/aatl_perfmod_arch/m5_binaries/cpu2000/binaries/sparc/linux/mcf +executable=/dist/m5/cpu2000/binaries/sparc/linux/mcf gid=100 -input=/proj/aatl_perfmod_arch/m5_binaries/cpu2000/data/mcf/smred/input/mcf.in +input=/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout index 6c4e0d9c5..a011c886e 100755 --- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout +++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Feb 25 2010 03:11:27 -M5 revision 1a33ca29ec29 6980 default share-aware-test-update.patch tip qtip -M5 started Feb 25 2010 03:27:41 -M5 executing on SC2B0619 +M5 compiled Feb 7 2011 02:13:30 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 02:14:01 +M5 executing on burrito command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt index 2eefb0962..282686242 100644 --- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt +++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1458389 # Simulator instruction rate (inst/s) -host_mem_usage 317928 # Number of bytes of host memory used -host_seconds 167.20 # Real time elapsed on the host -host_tick_rate 730976871 # Simulator tick rate (ticks/s) +host_inst_rate 1159873 # Simulator instruction rate (inst/s) +host_mem_usage 351876 # Number of bytes of host memory used +host_seconds 210.23 # Real time elapsed on the host +host_tick_rate 581353978 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 243835278 # Number of instructions simulated sim_seconds 0.122216 # Number of seconds simulated @@ -11,8 +11,24 @@ sim_ticks 122215830000 # Nu system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 244431661 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.num_busy_cycles 244431661 # Number of busy cycles +system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls +system.cpu.num_fp_alu_accesses 11630 # Number of float alu accesses +system.cpu.num_fp_insts 11630 # number of float instructions +system.cpu.num_fp_register_reads 23256 # number of times the floating registers were read +system.cpu.num_fp_register_writes 90 # number of times the floating registers were written +system.cpu.num_func_calls 0 # number of times a function call or return occured +system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 243835278 # Number of instructions executed -system.cpu.num_refs 105711442 # Number of memory references +system.cpu.num_int_alu_accesses 194726506 # Number of integer alu accesses +system.cpu.num_int_insts 194726506 # number of integer instructions +system.cpu.num_int_register_reads 456819010 # number of times the integer registers were read +system.cpu.num_int_register_writes 215451609 # number of times the integer registers were written +system.cpu.num_load_insts 82803522 # Number of load instructions +system.cpu.num_mem_refs 105711442 # number of memory refs +system.cpu.num_store_insts 22907920 # Number of store instructions system.cpu.workload.PROG:num_syscalls 443 # Number of system calls ---------- End Simulation Statistics ---------- diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini b/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini index e885b2b99..dd7acffe5 100644 --- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini +++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini @@ -1,13 +1,22 @@ [root] type=Root children=system -dummy=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 [system] type=System children=cpu membus physmem mem_mode=atomic physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu] type=TimingSimpleCPU @@ -152,14 +161,14 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=mcf mcf.in -cwd=build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-timing +cwd=build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-timing egid=100 env= errout=cerr euid=100 -executable=/home/stever/m5/dist/cpu2000/binaries/sparc/linux/mcf +executable=/dist/m5/cpu2000/binaries/sparc/linux/mcf gid=100 -input=/home/stever/m5/dist/cpu2000/data/mcf/smred/input/mcf.in +input=/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout b/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout index b2d326b66..280cd1a31 100755 --- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout +++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Sep 20 2010 15:04:49 -M5 revision 0c4a7d867247 7686 default qtip print-identical tip -M5 started Sep 20 2010 16:31:43 -M5 executing on phenom -command line: build/SPARC_SE/m5.opt -d build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-timing +M5 compiled Feb 7 2011 02:13:30 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 02:13:48 +M5 executing on burrito +command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt b/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt index f56720371..1b0d7fe21 100644 --- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt +++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1229097 # Simulator instruction rate (inst/s) -host_mem_usage 329428 # Number of bytes of host memory used -host_seconds 198.39 # Real time elapsed on the host -host_tick_rate 1826897848 # Simulator tick rate (ticks/s) +host_inst_rate 483058 # Simulator instruction rate (inst/s) +host_mem_usage 359588 # Number of bytes of host memory used +host_seconds 504.77 # Real time elapsed on the host +host_tick_rate 718005180 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 243835278 # Number of instructions simulated sim_seconds 0.362431 # Number of seconds simulated @@ -210,8 +210,24 @@ system.cpu.l2cache.warmup_cycle 0 # Cy system.cpu.l2cache.writebacks 40 # number of writebacks system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 724861774 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu.num_busy_cycles 724861774 # Number of busy cycles +system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls +system.cpu.num_fp_alu_accesses 11630 # Number of float alu accesses +system.cpu.num_fp_insts 11630 # number of float instructions +system.cpu.num_fp_register_reads 23256 # number of times the floating registers were read +system.cpu.num_fp_register_writes 90 # number of times the floating registers were written +system.cpu.num_func_calls 0 # number of times a function call or return occured +system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 243835278 # Number of instructions executed -system.cpu.num_refs 105711442 # Number of memory references +system.cpu.num_int_alu_accesses 194726506 # Number of integer alu accesses +system.cpu.num_int_insts 194726506 # number of integer instructions +system.cpu.num_int_register_reads 456819010 # number of times the integer registers were read +system.cpu.num_int_register_writes 215451608 # number of times the integer registers were written +system.cpu.num_load_insts 82803522 # Number of load instructions +system.cpu.num_mem_refs 105711442 # number of memory refs +system.cpu.num_store_insts 22907920 # Number of store instructions system.cpu.workload.PROG:num_syscalls 443 # Number of system calls ---------- End Simulation Statistics ---------- |