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-rw-r--r--tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini12
-rwxr-xr-xtests/long/10.mcf/ref/sparc/linux/simple-atomic/simout6
-rw-r--r--tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt19
-rw-r--r--tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini10
-rwxr-xr-xtests/long/10.mcf/ref/sparc/linux/simple-timing/simout6
-rw-r--r--tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt19
6 files changed, 49 insertions, 23 deletions
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini
index 7b0140e7c..77055bd16 100644
--- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini
@@ -10,6 +10,7 @@ type=System
children=cpu membus physmem
mem_mode=atomic
memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=AtomicSimpleCPU
@@ -45,8 +47,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
-dcache_port=system.membus.port[2]
-icache_port=system.membus.port[1]
+dcache_port=system.membus.port[3]
+icache_port=system.membus.port[2]
[system.cpu.dtb]
type=SparcTLB
@@ -62,7 +64,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=mcf mcf.in
-cwd=build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic
+cwd=build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-atomic
egid=100
env=
errout=cerr
@@ -86,7 +88,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
+port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
[system.physmem]
type=PhysicalMemory
@@ -96,5 +98,5 @@ latency_var=0
null=false
range=0:268435455
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout
index ef22c481f..18a19b6d7 100755
--- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Nov 30 2011 17:14:16
-gem5 started Nov 30 2011 17:16:48
+gem5 compiled Jan 23 2012 04:02:00
+gem5 started Jan 23 2012 06:20:13
gem5 executing on zizzer
-command line: build/SPARC_SE/gem5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic
+command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt
index a31e20e25..e3ffceab4 100644
--- a/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.122216 # Number of seconds simulated
sim_ticks 122215830000 # Number of ticks simulated
+final_tick 122215830000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 3705610 # Simulator instruction rate (inst/s)
-host_tick_rate 1857336235 # Simulator tick rate (ticks/s)
-host_mem_usage 328592 # Number of bytes of host memory used
-host_seconds 65.80 # Real time elapsed on the host
+host_inst_rate 3409932 # Simulator instruction rate (inst/s)
+host_tick_rate 1709135687 # Simulator tick rate (ticks/s)
+host_mem_usage 338176 # Number of bytes of host memory used
+host_seconds 71.51 # Real time elapsed on the host
sim_insts 243835278 # Number of instructions simulated
+system.physmem.bytes_read 1306360053 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 977686044 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 91606089 # Number of bytes written to this memory
+system.physmem.num_reads 326641945 # Number of read requests responded to by this memory
+system.physmem.num_writes 22901951 # Number of write requests responded to by this memory
+system.physmem.num_other 3886 # Number of other requests responded to by this memory
+system.physmem.bw_read 10688959466 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 7999667834 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 749543566 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 11438503032 # Total bandwidth to/from this memory (bytes/s)
system.cpu.workload.num_syscalls 443 # Number of system calls
system.cpu.numCycles 244431661 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini b/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
index f14a1754a..acd41b2d5 100644
--- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini
@@ -10,6 +10,7 @@ type=System
children=cpu membus physmem
mem_mode=atomic
memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=TimingSimpleCPU
@@ -147,7 +149,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
[system.cpu.toL2Bus]
type=Bus
@@ -165,7 +167,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=mcf mcf.in
-cwd=build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-timing
+cwd=build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-timing
egid=100
env=
errout=cerr
@@ -189,7 +191,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@@ -199,5 +201,5 @@ latency_var=0
null=false
range=0:268435455
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout b/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout
index 5a81ca9dc..ca44a686d 100755
--- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Nov 30 2011 17:14:16
-gem5 started Nov 30 2011 17:16:48
+gem5 compiled Jan 23 2012 04:02:00
+gem5 started Jan 23 2012 06:21:35
gem5 executing on zizzer
-command line: build/SPARC_SE/gem5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-timing
+command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/opt/long/10.mcf/sparc/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt b/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt
index cec6d8979..7dc591cfe 100644
--- a/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.362431 # Number of seconds simulated
sim_ticks 362430887000 # Number of ticks simulated
+final_tick 362430887000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1940887 # Simulator instruction rate (inst/s)
-host_tick_rate 2884887520 # Simulator tick rate (ticks/s)
-host_mem_usage 337564 # Number of bytes of host memory used
-host_seconds 125.63 # Real time elapsed on the host
+host_inst_rate 1587659 # Simulator instruction rate (inst/s)
+host_tick_rate 2359857170 # Simulator tick rate (ticks/s)
+host_mem_usage 346888 # Number of bytes of host memory used
+host_seconds 153.58 # Real time elapsed on the host
sim_insts 243835278 # Number of instructions simulated
+system.physmem.bytes_read 1001472 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 56256 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 2560 # Number of bytes written to this memory
+system.physmem.num_reads 15648 # Number of read requests responded to by this memory
+system.physmem.num_writes 40 # Number of write requests responded to by this memory
+system.physmem.num_other 0 # Number of other requests responded to by this memory
+system.physmem.bw_read 2763208 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 155219 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 7063 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 2770272 # Total bandwidth to/from this memory (bytes/s)
system.cpu.workload.num_syscalls 443 # Number of system calls
system.cpu.numCycles 724861774 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started