summaryrefslogtreecommitdiff
path: root/tests/long/10.mcf/ref/x86/linux/simple-atomic
diff options
context:
space:
mode:
Diffstat (limited to 'tests/long/10.mcf/ref/x86/linux/simple-atomic')
-rw-r--r--tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini7
-rwxr-xr-xtests/long/10.mcf/ref/x86/linux/simple-atomic/simerr3
-rwxr-xr-xtests/long/10.mcf/ref/x86/linux/simple-atomic/simout18
-rw-r--r--tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt38
4 files changed, 31 insertions, 35 deletions
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini b/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
index f21f47f4d..aaa5a7780 100644
--- a/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
@@ -9,6 +9,7 @@ time_sync_spin_threshold=100000000
type=System
children=cpu membus physmem
mem_mode=atomic
+memories=system.physmem
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -61,14 +62,14 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=mcf mcf.in
-cwd=build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-atomic
+cwd=build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-atomic
egid=100
env=
errout=cerr
euid=100
-executable=/dist/m5/cpu2000/binaries/x86/linux/mcf
+executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/mcf
gid=100
-input=/dist/m5/cpu2000/data/mcf/smred/input/mcf.in
+input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in
max_stack_size=67108864
output=cout
pid=100
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-atomic/simerr b/tests/long/10.mcf/ref/x86/linux/simple-atomic/simerr
index 94d399eab..ac4ad20a5 100755
--- a/tests/long/10.mcf/ref/x86/linux/simple-atomic/simerr
+++ b/tests/long/10.mcf/ref/x86/linux/simple-atomic/simerr
@@ -1,7 +1,4 @@
warn: Sockets disabled, not accepting gdb connections
-For more information see: http://www.m5sim.org/warn/d946bea6
warn: instruction 'fnstcw_Mw' unimplemented
-For more information see: http://www.m5sim.org/warn/437d5238
warn: instruction 'fldcw_Mw' unimplemented
-For more information see: http://www.m5sim.org/warn/437d5238
hack: be nice to actually delete the event here
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-atomic/simout b/tests/long/10.mcf/ref/x86/linux/simple-atomic/simout
index 0d61b002c..c929e4789 100755
--- a/tests/long/10.mcf/ref/x86/linux/simple-atomic/simout
+++ b/tests/long/10.mcf/ref/x86/linux/simple-atomic/simout
@@ -1,14 +1,12 @@
-M5 Simulator System
+Redirecting stdout to build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-atomic/simout
+Redirecting stderr to build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-atomic/simerr
+gem5 Simulator System. http://gem5.org
+gem5 is copyrighted software; use the --copyright option for details.
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Apr 19 2011 12:22:33
-M5 started Apr 19 2011 12:39:34
-M5 executing on maize
-command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-atomic -re tests/run.py build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-atomic
+gem5 compiled Jan 9 2012 14:18:02
+gem5 started Jan 9 2012 14:29:08
+gem5 executing on ribera.cs.wisc.edu
+command line: build/X86_SE/gem5.opt -d build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-atomic -re tests/run.py build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt b/tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt
index ed3183ec3..0cce68f38 100644
--- a/tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt
@@ -1,34 +1,34 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 3107267 # Simulator instruction rate (inst/s)
-host_mem_usage 337076 # Number of bytes of host memory used
-host_seconds 89.53 # Real time elapsed on the host
-host_tick_rate 1887081425 # Simulator tick rate (ticks/s)
-sim_freq 1000000000000 # Frequency of simulated ticks
-sim_insts 278192520 # Number of instructions simulated
sim_seconds 0.168950 # Number of seconds simulated
sim_ticks 168950072000 # Number of ticks simulated
-system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
+sim_freq 1000000000000 # Frequency of simulated ticks
+host_inst_rate 1147935 # Simulator instruction rate (inst/s)
+host_tick_rate 697156581 # Simulator tick rate (ticks/s)
+host_mem_usage 368676 # Number of bytes of host memory used
+host_seconds 242.34 # Real time elapsed on the host
+sim_insts 278192520 # Number of instructions simulated
+system.cpu.workload.num_syscalls 444 # Number of system calls
system.cpu.numCycles 337900145 # number of cpu cycles simulated
-system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
-system.cpu.num_busy_cycles 337900145 # Number of busy cycles
-system.cpu.num_conditional_control_insts 18628012 # number of instructions that are conditional controls
-system.cpu.num_fp_alu_accesses 40 # Number of float alu accesses
-system.cpu.num_fp_insts 40 # number of float instructions
-system.cpu.num_fp_register_reads 40 # number of times the floating registers were read
-system.cpu.num_fp_register_writes 26 # number of times the floating registers were written
-system.cpu.num_func_calls 0 # number of times a function call or return occured
-system.cpu.num_idle_cycles 0 # Number of idle cycles
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.num_insts 278192520 # Number of instructions executed
system.cpu.num_int_alu_accesses 278186228 # Number of integer alu accesses
+system.cpu.num_fp_alu_accesses 40 # Number of float alu accesses
+system.cpu.num_func_calls 0 # number of times a function call or return occured
+system.cpu.num_conditional_control_insts 18628012 # number of instructions that are conditional controls
system.cpu.num_int_insts 278186228 # number of integer instructions
+system.cpu.num_fp_insts 40 # number of float instructions
system.cpu.num_int_register_reads 685043114 # number of times the integer registers were read
system.cpu.num_int_register_writes 248344166 # number of times the integer registers were written
-system.cpu.num_load_insts 90779388 # Number of load instructions
+system.cpu.num_fp_register_reads 40 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 26 # number of times the floating registers were written
system.cpu.num_mem_refs 122219139 # number of memory refs
+system.cpu.num_load_insts 90779388 # Number of load instructions
system.cpu.num_store_insts 31439751 # Number of store instructions
-system.cpu.workload.num_syscalls 444 # Number of system calls
+system.cpu.num_idle_cycles 0 # Number of idle cycles
+system.cpu.num_busy_cycles 337900145 # Number of busy cycles
+system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0 # Percentage of idle cycles
---------- End Simulation Statistics ----------