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-rw-r--r--tests/long/10.mcf/ref/x86/linux/o3-timing/config.ini9
-rwxr-xr-xtests/long/10.mcf/ref/x86/linux/o3-timing/simout8
-rw-r--r--tests/long/10.mcf/ref/x86/linux/o3-timing/stats.txt30
-rw-r--r--tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini9
-rwxr-xr-xtests/long/10.mcf/ref/x86/linux/simple-atomic/simout8
-rw-r--r--tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt26
-rw-r--r--tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini9
-rwxr-xr-xtests/long/10.mcf/ref/x86/linux/simple-timing/simout8
-rw-r--r--tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt26
9 files changed, 104 insertions, 29 deletions
diff --git a/tests/long/10.mcf/ref/x86/linux/o3-timing/config.ini b/tests/long/10.mcf/ref/x86/linux/o3-timing/config.ini
index 60f53a64a..8e006cde5 100644
--- a/tests/long/10.mcf/ref/x86/linux/o3-timing/config.ini
+++ b/tests/long/10.mcf/ref/x86/linux/o3-timing/config.ini
@@ -10,6 +10,13 @@ type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
[system.cpu]
type=DerivO3CPU
@@ -481,7 +488,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=mcf mcf.in
-cwd=build/X86_SE/tests/opt/long/10.mcf/x86/linux/o3-timing
+cwd=build/X86_SE/tests/fast/long/10.mcf/x86/linux/o3-timing
egid=100
env=
errout=cerr
diff --git a/tests/long/10.mcf/ref/x86/linux/o3-timing/simout b/tests/long/10.mcf/ref/x86/linux/o3-timing/simout
index fde487a8e..bf0cc96de 100755
--- a/tests/long/10.mcf/ref/x86/linux/o3-timing/simout
+++ b/tests/long/10.mcf/ref/x86/linux/o3-timing/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Jan 31 2011 16:34:44
-M5 revision 1b98eea40540 7883 default qtip tip x86o3regressions.patch
-M5 started Jan 31 2011 16:34:46
+M5 compiled Feb 7 2011 02:32:07
+M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
+M5 started Feb 7 2011 02:32:24
M5 executing on burrito
-command line: build/X86_SE/m5.opt -d build/X86_SE/tests/opt/long/10.mcf/x86/linux/o3-timing -re tests/run.py build/X86_SE/tests/opt/long/10.mcf/x86/linux/o3-timing
+command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/10.mcf/x86/linux/o3-timing -re tests/run.py build/X86_SE/tests/fast/long/10.mcf/x86/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.mcf/ref/x86/linux/o3-timing/stats.txt b/tests/long/10.mcf/ref/x86/linux/o3-timing/stats.txt
index 8ba88fe5a..3db6ff161 100644
--- a/tests/long/10.mcf/ref/x86/linux/o3-timing/stats.txt
+++ b/tests/long/10.mcf/ref/x86/linux/o3-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 76828 # Simulator instruction rate (inst/s)
-host_mem_usage 366252 # Number of bytes of host memory used
-host_seconds 3621.00 # Real time elapsed on the host
-host_tick_rate 47136339 # Simulator tick rate (ticks/s)
+host_inst_rate 83481 # Simulator instruction rate (inst/s)
+host_mem_usage 366872 # Number of bytes of host memory used
+host_seconds 3332.41 # Real time elapsed on the host
+host_tick_rate 51218385 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 278192519 # Number of instructions simulated
sim_seconds 0.170681 # Number of seconds simulated
@@ -37,6 +37,9 @@ system.cpu.commit.COM:committed_per_cycle::min_value 0
system.cpu.commit.COM:committed_per_cycle::max_value 8 # Number of insts commited each cycle
system.cpu.commit.COM:committed_per_cycle::total 321793097 # Number of insts commited each cycle
system.cpu.commit.COM:count 278192519 # Number of instructions committed
+system.cpu.commit.COM:fp_insts 40 # Number of committed floating point instructions.
+system.cpu.commit.COM:function_calls 0 # Number of function calls committed.
+system.cpu.commit.COM:int_insts 278186227 # Number of committed integer instructions.
system.cpu.commit.COM:loads 90779388 # Number of loads committed
system.cpu.commit.COM:membars 0 # Number of memory barriers committed
system.cpu.commit.COM:refs 122219139 # Number of memory references committed
@@ -150,6 +153,8 @@ system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Nu
system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total)
system.cpu.fetch.rateDist::total 341246945 # Number of instructions fetched each cycle (Total)
+system.cpu.fp_regfile_reads 44 # number of floating regfile reads
+system.cpu.fp_regfile_writes 31 # number of floating regfile writes
system.cpu.icache.ReadReq_accesses 39245397 # number of ReadReq accesses(hits+misses)
system.cpu.icache.ReadReq_avg_miss_latency 37208.490566 # average ReadReq miss latency
system.cpu.icache.ReadReq_avg_mshr_miss_latency 35316.192560 # average ReadReq mshr miss latency
@@ -249,6 +254,8 @@ system.cpu.iew.lsq.thread.0.squashedStores 9599437 #
system.cpu.iew.memOrderViolationEvents 5520980 # Number of memory order violations
system.cpu.iew.predictedNotTakenIncorrect 16897 # Number of branches that were predicted not taken incorrectly
system.cpu.iew.predictedTakenIncorrect 5373424 # Number of branches that were predicted taken incorrectly
+system.cpu.int_regfile_reads 754340794 # number of integer regfile reads
+system.cpu.int_regfile_writes 286169707 # number of integer regfile writes
system.cpu.ipc 0.814950 # IPC: Instructions Per Cycle
system.cpu.ipc_total 0.814950 # IPC: Total IPC of All Threads
system.cpu.iq.ISSUE:FU_type_0::No_OpClass 16700 0.01% 0.01% # Type of FU issued
@@ -340,6 +347,14 @@ system.cpu.iq.ISSUE:issued_per_cycle::min_value 0
system.cpu.iq.ISSUE:issued_per_cycle::max_value 8 # Number of insts issued each cycle
system.cpu.iq.ISSUE:issued_per_cycle::total 341246945 # Number of insts issued each cycle
system.cpu.iq.ISSUE:rate 0.976510 # Inst issue rate
+system.cpu.iq.fp_alu_accesses 55 # Number of floating point alu accesses
+system.cpu.iq.fp_inst_queue_reads 110 # Number of floating instruction queue reads
+system.cpu.iq.fp_inst_queue_wakeup_accesses 49 # Number of floating instruction queue wakeup accesses
+system.cpu.iq.fp_inst_queue_writes 110 # Number of floating instruction queue writes
+system.cpu.iq.int_alu_accesses 333424039 # Number of integer alu accesses
+system.cpu.iq.int_inst_queue_reads 1008030271 # Number of integer instruction queue reads
+system.cpu.iq.int_inst_queue_wakeup_accesses 317781500 # Number of integer instruction queue wakeup accesses
+system.cpu.iq.int_inst_queue_writes 504991584 # Number of integer instruction queue writes
system.cpu.iq.iqInstsAdded 389592403 # Number of instructions added to the IQ (excludes non-spec)
system.cpu.iq.iqInstsIssued 333342642 # Number of instructions issued
system.cpu.iq.iqNonSpecInstsAdded 455 # Number of non-speculative instructions added to the IQ
@@ -419,7 +434,10 @@ system.cpu.memDep0.conflictingLoads 22358679 # Nu
system.cpu.memDep0.conflictingStores 3757180 # Number of conflicting stores.
system.cpu.memDep0.insertedLoads 131280417 # Number of loads inserted to the mem dependence unit.
system.cpu.memDep0.insertedStores 41039188 # Number of stores inserted to the mem dependence unit.
+system.cpu.misc_regfile_reads 204301939 # number of misc regfile reads
system.cpu.numCycles 341361263 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.rename.RENAME:BlockCycles 486743 # Number of cycles rename is blocking
system.cpu.rename.RENAME:CommittedMaps 248344192 # Number of HB maps that are committed
system.cpu.rename.RENAME:IQFullEvents 12249 # Number of times rename has blocked due to IQ full
@@ -432,10 +450,14 @@ system.cpu.rename.RENAME:RunCycles 222275258 # Nu
system.cpu.rename.RENAME:SquashCycles 19453848 # Number of cycles rename is squashing
system.cpu.rename.RENAME:UnblockCycles 514692 # Number of cycles rename is unblocking
system.cpu.rename.RENAME:UndoneMaps 129004058 # Number of HB maps that are undone due to squashing
+system.cpu.rename.RENAME:fp_rename_lookups 291 # Number of floating rename lookups
+system.cpu.rename.RENAME:int_rename_lookups 1292599352 # Number of integer rename lookups
system.cpu.rename.RENAME:serializeStallCycles 5287 # count of cycles rename stalled for serializing inst
system.cpu.rename.RENAME:serializingInsts 454 # count of serializing insts renamed
system.cpu.rename.RENAME:skidInsts 779091 # count of insts added to the skid buffer
system.cpu.rename.RENAME:tempSerializingInsts 452 # count of temporary serializing insts renamed
+system.cpu.rob.rob_reads 708961934 # The number of ROB reads
+system.cpu.rob.rob_writes 799263493 # The number of ROB writes
system.cpu.timesIdled 5627 # Number of times that the entire CPU went into an idle state and unscheduled itself
system.cpu.workload.PROG:num_syscalls 444 # Number of system calls
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini b/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
index f7e610d03..f21f47f4d 100644
--- a/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini
@@ -10,6 +10,13 @@ type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
[system.cpu]
type=AtomicSimpleCPU
@@ -54,7 +61,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=mcf mcf.in
-cwd=build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-atomic
+cwd=build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-atomic
egid=100
env=
errout=cerr
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-atomic/simout b/tests/long/10.mcf/ref/x86/linux/simple-atomic/simout
index dfdd5bece..e76d60819 100755
--- a/tests/long/10.mcf/ref/x86/linux/simple-atomic/simout
+++ b/tests/long/10.mcf/ref/x86/linux/simple-atomic/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Jan 31 2011 14:03:49
-M5 revision aa283c8952a9 7880 default qtip stupdstats.patch tip
-M5 started Jan 31 2011 14:03:51
+M5 compiled Feb 7 2011 02:32:07
+M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
+M5 started Feb 7 2011 02:32:12
M5 executing on burrito
-command line: build/X86_SE/m5.opt -d build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-atomic -re tests/run.py build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-atomic
+command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-atomic -re tests/run.py build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt b/tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt
index 82026f43b..bcab65c40 100644
--- a/tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 938582 # Simulator instruction rate (inst/s)
-host_mem_usage 354336 # Number of bytes of host memory used
-host_seconds 296.40 # Real time elapsed on the host
-host_tick_rate 570013222 # Simulator tick rate (ticks/s)
+host_inst_rate 722489 # Simulator instruction rate (inst/s)
+host_mem_usage 358012 # Number of bytes of host memory used
+host_seconds 385.05 # Real time elapsed on the host
+host_tick_rate 438776725 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 278192520 # Number of instructions simulated
sim_seconds 0.168950 # Number of seconds simulated
@@ -11,8 +11,24 @@ sim_ticks 168950072000 # Nu
system.cpu.idle_fraction 0 # Percentage of idle cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 337900145 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu.num_busy_cycles 337900145 # Number of busy cycles
+system.cpu.num_conditional_control_insts 18628012 # number of instructions that are conditional controls
+system.cpu.num_fp_alu_accesses 40 # Number of float alu accesses
+system.cpu.num_fp_insts 40 # number of float instructions
+system.cpu.num_fp_register_reads 40 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 26 # number of times the floating registers were written
+system.cpu.num_func_calls 0 # number of times a function call or return occured
+system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 278192520 # Number of instructions executed
-system.cpu.num_refs 122219139 # Number of memory references
+system.cpu.num_int_alu_accesses 278186228 # Number of integer alu accesses
+system.cpu.num_int_insts 278186228 # number of integer instructions
+system.cpu.num_int_register_reads 855210512 # number of times the integer registers were read
+system.cpu.num_int_register_writes 248344166 # number of times the integer registers were written
+system.cpu.num_load_insts 90779388 # Number of load instructions
+system.cpu.num_mem_refs 122219139 # number of memory refs
+system.cpu.num_store_insts 31439751 # Number of store instructions
system.cpu.workload.PROG:num_syscalls 444 # Number of system calls
---------- End Simulation Statistics ----------
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini b/tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini
index 217d838ce..12f3ad44d 100644
--- a/tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini
+++ b/tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini
@@ -10,6 +10,13 @@ type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
[system.cpu]
type=TimingSimpleCPU
@@ -154,7 +161,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=mcf mcf.in
-cwd=build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-timing
+cwd=build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-timing
egid=100
env=
errout=cerr
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-timing/simout b/tests/long/10.mcf/ref/x86/linux/simple-timing/simout
index 68ecd8732..0b92276cc 100755
--- a/tests/long/10.mcf/ref/x86/linux/simple-timing/simout
+++ b/tests/long/10.mcf/ref/x86/linux/simple-timing/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Jan 31 2011 14:03:49
-M5 revision aa283c8952a9 7880 default qtip stupdstats.patch tip
-M5 started Jan 31 2011 14:03:51
+M5 compiled Feb 7 2011 02:32:07
+M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
+M5 started Feb 7 2011 02:32:12
M5 executing on burrito
-command line: build/X86_SE/m5.opt -d build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-timing -re tests/run.py build/X86_SE/tests/opt/long/10.mcf/x86/linux/simple-timing
+command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-timing -re tests/run.py build/X86_SE/tests/fast/long/10.mcf/x86/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt b/tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt
index 7c84c26e1..cf6f03e98 100644
--- a/tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 734335 # Simulator instruction rate (inst/s)
-host_mem_usage 362052 # Number of bytes of host memory used
-host_seconds 378.84 # Real time elapsed on the host
-host_tick_rate 976703915 # Simulator tick rate (ticks/s)
+host_inst_rate 424375 # Simulator instruction rate (inst/s)
+host_mem_usage 365728 # Number of bytes of host memory used
+host_seconds 655.54 # Real time elapsed on the host
+host_tick_rate 564440982 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 278192520 # Number of instructions simulated
sim_seconds 0.370011 # Number of seconds simulated
@@ -200,8 +200,24 @@ system.cpu.l2cache.warmup_cycle 0 # Cy
system.cpu.l2cache.writebacks 29460 # number of writebacks
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 740021680 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu.num_busy_cycles 740021680 # Number of busy cycles
+system.cpu.num_conditional_control_insts 18628012 # number of instructions that are conditional controls
+system.cpu.num_fp_alu_accesses 40 # Number of float alu accesses
+system.cpu.num_fp_insts 40 # number of float instructions
+system.cpu.num_fp_register_reads 40 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 26 # number of times the floating registers were written
+system.cpu.num_func_calls 0 # number of times a function call or return occured
+system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 278192520 # Number of instructions executed
-system.cpu.num_refs 122219139 # Number of memory references
+system.cpu.num_int_alu_accesses 278186228 # Number of integer alu accesses
+system.cpu.num_int_insts 278186228 # number of integer instructions
+system.cpu.num_int_register_reads 855210512 # number of times the integer registers were read
+system.cpu.num_int_register_writes 248344166 # number of times the integer registers were written
+system.cpu.num_load_insts 90779388 # Number of load instructions
+system.cpu.num_mem_refs 122219139 # number of memory refs
+system.cpu.num_store_insts 31439751 # Number of store instructions
system.cpu.workload.PROG:num_syscalls 444 # Number of system calls
---------- End Simulation Statistics ----------