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-rw-r--r--tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini4
-rwxr-xr-xtests/long/20.parser/ref/arm/linux/simple-atomic/simout10
-rw-r--r--tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt36
3 files changed, 25 insertions, 25 deletions
diff --git a/tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini b/tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini
index 8b55eca4f..a151096ae 100644
--- a/tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini
+++ b/tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini
@@ -66,9 +66,9 @@ egid=100
env=
errout=cerr
euid=100
-executable=/dist/m5/cpu2000/binaries/arm/linux/parser
+executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/parser
gid=100
-input=/dist/m5/cpu2000/data/parser/mdred/input/parser.in
+input=/chips/pd/randd/dist/cpu2000/data/parser/mdred/input/parser.in
max_stack_size=67108864
output=cout
pid=100
diff --git a/tests/long/20.parser/ref/arm/linux/simple-atomic/simout b/tests/long/20.parser/ref/arm/linux/simple-atomic/simout
index c27562976..b7bee7747 100755
--- a/tests/long/20.parser/ref/arm/linux/simple-atomic/simout
+++ b/tests/long/20.parser/ref/arm/linux/simple-atomic/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Feb 7 2011 01:56:16
-M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip
-M5 started Feb 7 2011 01:56:25
-M5 executing on burrito
+M5 compiled Mar 11 2011 20:10:09
+M5 revision 4decc284606a 8095 default qtip tip ext/update_add_stats.patch
+M5 started Mar 11 2011 20:56:42
+M5 executing on u200439-lin.austin.arm.com
command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
@@ -72,4 +72,4 @@ info: Increasing stack size by one page.
about 2 million people attended
the five best costumes got prizes
No errors!
-Exiting @ tick 285716811500 because target called exit()
+Exiting @ tick 290498972000 because target called exit()
diff --git a/tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt b/tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt
index 0871fb1fa..ebf53733b 100644
--- a/tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt
+++ b/tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt
@@ -1,13 +1,13 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 1052675 # Simulator instruction rate (inst/s)
-host_mem_usage 232888 # Number of bytes of host memory used
-host_seconds 533.31 # Real time elapsed on the host
-host_tick_rate 535740490 # Simulator tick rate (ticks/s)
+host_inst_rate 1809145 # Simulator instruction rate (inst/s)
+host_mem_usage 249796 # Number of bytes of host memory used
+host_seconds 315.60 # Real time elapsed on the host
+host_tick_rate 920461558 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
-sim_insts 561403855 # Number of instructions simulated
-sim_seconds 0.285717 # Number of seconds simulated
-sim_ticks 285716811500 # Number of ticks simulated
+sim_insts 570968176 # Number of instructions simulated
+sim_seconds 0.290499 # Number of seconds simulated
+sim_ticks 290498972000 # Number of ticks simulated
system.cpu.dtb.accesses 0 # DTB accesses
system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions
system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions
@@ -52,24 +52,24 @@ system.cpu.itb.write_accesses 0 # DT
system.cpu.itb.write_hits 0 # DTB write hits
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu.numCycles 571433624 # number of cpu cycles simulated
+system.cpu.numCycles 580997945 # number of cpu cycles simulated
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
-system.cpu.num_busy_cycles 571433624 # Number of busy cycles
-system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls
+system.cpu.num_busy_cycles 580997945 # Number of busy cycles
+system.cpu.num_conditional_control_insts 92286726 # number of instructions that are conditional controls
system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses
system.cpu.num_fp_insts 16 # number of float instructions
system.cpu.num_fp_register_reads 16 # number of times the floating registers were read
system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
-system.cpu.num_func_calls 0 # number of times a function call or return occured
+system.cpu.num_func_calls 16003168 # number of times a function call or return occured
system.cpu.num_idle_cycles 0 # Number of idle cycles
-system.cpu.num_insts 561403855 # Number of instructions executed
-system.cpu.num_int_alu_accesses 464140465 # Number of integer alu accesses
-system.cpu.num_int_insts 464140465 # number of integer instructions
-system.cpu.num_int_register_reads 1370673061 # number of times the integer registers were read
-system.cpu.num_int_register_writes 415936275 # number of times the integer registers were written
-system.cpu.num_load_insts 128127024 # Number of load instructions
-system.cpu.num_mem_refs 184987503 # number of memory refs
+system.cpu.num_insts 570968176 # Number of instructions executed
+system.cpu.num_int_alu_accesses 470727703 # Number of integer alu accesses
+system.cpu.num_int_insts 470727703 # number of integer instructions
+system.cpu.num_int_register_reads 1385336079 # number of times the integer registers were read
+system.cpu.num_int_register_writes 425457618 # number of times the integer registers were written
+system.cpu.num_load_insts 126029556 # Number of load instructions
+system.cpu.num_mem_refs 182890035 # number of memory refs
system.cpu.num_store_insts 56860479 # Number of store instructions
system.cpu.workload.PROG:num_syscalls 548 # Number of system calls