diff options
Diffstat (limited to 'tests/long/20.parser/ref/arm/linux/simple-timing')
4 files changed, 11 insertions, 14 deletions
diff --git a/tests/long/20.parser/ref/arm/linux/simple-timing/config.ini b/tests/long/20.parser/ref/arm/linux/simple-timing/config.ini index 043ad11cc..75a3e24c1 100644 --- a/tests/long/20.parser/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/20.parser/ref/arm/linux/simple-timing/config.ini @@ -164,7 +164,7 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=parser 2.1.dict -batch -cwd=build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-timing +cwd=build/ARM_SE/tests/opt/long/20.parser/arm/linux/simple-timing egid=100 env= errout=cerr diff --git a/tests/long/20.parser/ref/arm/linux/simple-timing/simerr b/tests/long/20.parser/ref/arm/linux/simple-timing/simerr index cdafa164c..eabe42249 100755 --- a/tests/long/20.parser/ref/arm/linux/simple-timing/simerr +++ b/tests/long/20.parser/ref/arm/linux/simple-timing/simerr @@ -1,5 +1,3 @@ warn: Sockets disabled, not accepting gdb connections For more information see: http://www.m5sim.org/warn/d946bea6 -warn: Complete acc isn't called on normal stores in O3. -For more information see: http://www.m5sim.org/warn/138d8573 hack: be nice to actually delete the event here diff --git a/tests/long/20.parser/ref/arm/linux/simple-timing/simout b/tests/long/20.parser/ref/arm/linux/simple-timing/simout index 3a9b66fdf..697084dd6 100755 --- a/tests/long/20.parser/ref/arm/linux/simple-timing/simout +++ b/tests/long/20.parser/ref/arm/linux/simple-timing/simout @@ -5,11 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Mar 11 2011 20:10:09 -M5 revision 4decc284606a 8095 default qtip tip ext/update_add_stats.patch -M5 started Mar 11 2011 20:33:09 +M5 compiled Mar 30 2011 17:47:57 +M5 started Mar 30 2011 17:57:49 M5 executing on u200439-lin.austin.arm.com -command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/fast/long/20.parser/arm/linux/simple-timing +command line: build/ARM_SE/m5.opt -d build/ARM_SE/tests/opt/long/20.parser/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/opt/long/20.parser/arm/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/20.parser/ref/arm/linux/simple-timing/stats.txt b/tests/long/20.parser/ref/arm/linux/simple-timing/stats.txt index 54e168a67..3b54b12a7 100644 --- a/tests/long/20.parser/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/20.parser/ref/arm/linux/simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 827470 # Simulator instruction rate (inst/s) -host_mem_usage 257480 # Number of bytes of host memory used -host_seconds 687.68 # Real time elapsed on the host -host_tick_rate 1050246633 # Simulator tick rate (ticks/s) +host_inst_rate 577686 # Simulator instruction rate (inst/s) +host_mem_usage 258200 # Number of bytes of host memory used +host_seconds 985.02 # Real time elapsed on the host +host_tick_rate 733214267 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 569034848 # Number of instructions simulated sim_seconds 0.722234 # Number of seconds simulated @@ -249,18 +249,18 @@ system.cpu.numCycles 1444468728 # nu system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.num_busy_cycles 1444468728 # Number of busy cycles -system.cpu.num_conditional_control_insts 92286726 # number of instructions that are conditional controls +system.cpu.num_conditional_control_insts 95872736 # number of instructions that are conditional controls system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses system.cpu.num_fp_insts 16 # number of float instructions system.cpu.num_fp_register_reads 16 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu.num_func_calls 16003168 # number of times a function call or return occured +system.cpu.num_func_calls 15725605 # number of times a function call or return occured system.cpu.num_idle_cycles 0 # Number of idle cycles system.cpu.num_insts 569034848 # Number of instructions executed system.cpu.num_int_alu_accesses 470727703 # Number of integer alu accesses system.cpu.num_int_insts 470727703 # number of integer instructions system.cpu.num_int_register_reads 1511252780 # number of times the integer registers were read -system.cpu.num_int_register_writes 425461081 # number of times the integer registers were written +system.cpu.num_int_register_writes 425113002 # number of times the integer registers were written system.cpu.num_load_insts 126029556 # Number of load instructions system.cpu.num_mem_refs 182890035 # number of memory refs system.cpu.num_store_insts 56860479 # Number of store instructions |