diff options
Diffstat (limited to 'tests/long/30.eon/ref/arm/linux/simple-timing')
| -rwxr-xr-x | tests/long/30.eon/ref/arm/linux/simple-timing/simout | 6 | ||||
| -rw-r--r-- | tests/long/30.eon/ref/arm/linux/simple-timing/stats.txt | 12 |
2 files changed, 9 insertions, 9 deletions
diff --git a/tests/long/30.eon/ref/arm/linux/simple-timing/simout b/tests/long/30.eon/ref/arm/linux/simple-timing/simout index 986b22d40..d8c065b6e 100755 --- a/tests/long/30.eon/ref/arm/linux/simple-timing/simout +++ b/tests/long/30.eon/ref/arm/linux/simple-timing/simout @@ -5,9 +5,9 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Jul 25 2010 20:52:35 -M5 revision ffac9df60637 7512 default tip -M5 started Jul 26 2010 23:53:36 +M5 compiled Aug 24 2010 15:34:40 +M5 revision 1c687284910c 7619 default qtip round2.patch tip qbase +M5 started Aug 24 2010 15:37:41 M5 executing on zizzer command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/30.eon/arm/linux/simple-timing -re tests/run.py build/ARM_SE/tests/fast/long/30.eon/arm/linux/simple-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/long/30.eon/ref/arm/linux/simple-timing/stats.txt b/tests/long/30.eon/ref/arm/linux/simple-timing/stats.txt index 792d75c5d..ccb6f986c 100644 --- a/tests/long/30.eon/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/30.eon/ref/arm/linux/simple-timing/stats.txt @@ -1,11 +1,11 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1001528 # Simulator instruction rate (inst/s) -host_mem_usage 213556 # Number of bytes of host memory used -host_seconds 343.67 # Real time elapsed on the host -host_tick_rate 1530053892 # Simulator tick rate (ticks/s) +host_inst_rate 1023413 # Simulator instruction rate (inst/s) +host_mem_usage 218276 # Number of bytes of host memory used +host_seconds 336.52 # Real time elapsed on the host +host_tick_rate 1562566741 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks -sim_insts 344196749 # Number of instructions simulated +sim_insts 344399678 # Number of instructions simulated sim_seconds 0.525836 # Number of seconds simulated sim_ticks 525836291000 # Number of ticks simulated system.cpu.dcache.ReadReq_accesses 94586725 # number of ReadReq accesses(hits+misses) @@ -226,7 +226,7 @@ system.cpu.l2cache.warmup_cycle 0 # Cy system.cpu.l2cache.writebacks 0 # number of writebacks system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 1051672582 # number of cpu cycles simulated -system.cpu.num_insts 344196749 # Number of instructions executed +system.cpu.num_insts 344399678 # Number of instructions executed system.cpu.num_refs 177028576 # Number of memory references system.cpu.workload.PROG:num_syscalls 191 # Number of system calls |