diff options
Diffstat (limited to 'tests/long/40.perlbmk')
4 files changed, 32 insertions, 32 deletions
diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout index 2316b9142..2b957fca5 100755 --- a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout @@ -5,8 +5,8 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 19 2011 11:52:53 -M5 started Apr 19 2011 11:58:35 +M5 compiled Apr 21 2011 12:29:56 +M5 started Apr 21 2011 13:02:51 M5 executing on maize command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/40.perlbmk/alpha/tru64/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt index c6cbb8474..1074a9ea8 100644 --- a/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 299190 # Simulator instruction rate (inst/s) -host_mem_usage 211252 # Number of bytes of host memory used -host_seconds 6093.26 # Real time elapsed on the host -host_tick_rate 113092899 # Simulator tick rate (ticks/s) +host_inst_rate 175234 # Simulator instruction rate (inst/s) +host_mem_usage 214520 # Number of bytes of host memory used +host_seconds 10403.50 # Real time elapsed on the host +host_tick_rate 66237786 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1823043370 # Number of instructions simulated sim_seconds 0.689105 # Number of seconds simulated @@ -254,16 +254,16 @@ system.cpu.iew.iewIdleCycles 0 # Nu system.cpu.iew.iewLSQFullEvents 3376 # Number of times the LSQ has become full, causing a stall system.cpu.iew.iewSquashCycles 94589845 # Number of cycles IEW is squashing system.cpu.iew.iewUnblockCycles 136604 # Number of cycles IEW is unblocking -system.cpu.iew.lsq.thread.0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding -system.cpu.iew.lsq.thread.0.cacheBlocked 15 # Number of times an access to memory failed due to the cache being blocked -system.cpu.iew.lsq.thread.0.forwLoads 51921347 # Number of loads that had data forwarded from stores -system.cpu.iew.lsq.thread.0.ignoredResponses 444 # Number of memory responses ignored because the instruction is squashed -system.cpu.iew.lsq.thread.0.invAddrLoads 0 # Number of loads ignored due to an invalid address -system.cpu.iew.lsq.thread.0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address -system.cpu.iew.lsq.thread.0.memOrderViolation 1647 # Number of memory ordering violations -system.cpu.iew.lsq.thread.0.rescheduledLoads 4160 # Number of loads that were rescheduled -system.cpu.iew.lsq.thread.0.squashedLoads 130104006 # Number of loads squashed -system.cpu.iew.lsq.thread.0.squashedStores 84105156 # Number of stores squashed +system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding +system.cpu.iew.lsq.thread0.cacheBlocked 15 # Number of times an access to memory failed due to the cache being blocked +system.cpu.iew.lsq.thread0.forwLoads 51921347 # Number of loads that had data forwarded from stores +system.cpu.iew.lsq.thread0.ignoredResponses 444 # Number of memory responses ignored because the instruction is squashed +system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address +system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address +system.cpu.iew.lsq.thread0.memOrderViolation 1647 # Number of memory ordering violations +system.cpu.iew.lsq.thread0.rescheduledLoads 4160 # Number of loads that were rescheduled +system.cpu.iew.lsq.thread0.squashedLoads 130104006 # Number of loads squashed +system.cpu.iew.lsq.thread0.squashedStores 84105156 # Number of stores squashed system.cpu.iew.memOrderViolationEvents 1647 # Number of memory order violations system.cpu.iew.predictedNotTakenIncorrect 787925 # Number of branches that were predicted not taken incorrectly system.cpu.iew.predictedTakenIncorrect 30089490 # Number of branches that were predicted taken incorrectly diff --git a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simout b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simout index ef09fb549..7274e4b93 100755 --- a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simout +++ b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/simout @@ -5,8 +5,8 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 19 2011 12:47:10 -M5 started Apr 19 2011 13:00:27 +M5 compiled Apr 21 2011 12:05:01 +M5 started Apr 21 2011 14:31:07 M5 executing on maize command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/40.perlbmk/arm/linux/o3-timing -re tests/run.py build/ARM_SE/tests/fast/long/40.perlbmk/arm/linux/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/stats.txt b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/stats.txt index d75eda4b1..4b473ce36 100644 --- a/tests/long/40.perlbmk/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/40.perlbmk/ref/arm/linux/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 198311 # Simulator instruction rate (inst/s) -host_mem_usage 221048 # Number of bytes of host memory used -host_seconds 9507.00 # Real time elapsed on the host -host_tick_rate 91419245 # Simulator tick rate (ticks/s) +host_inst_rate 123746 # Simulator instruction rate (inst/s) +host_mem_usage 223548 # Number of bytes of host memory used +host_seconds 15235.59 # Real time elapsed on the host +host_tick_rate 57045555 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1885343131 # Number of instructions simulated sim_seconds 0.869123 # Number of seconds simulated @@ -266,16 +266,16 @@ system.cpu.iew.iewIdleCycles 0 # Nu system.cpu.iew.iewLSQFullEvents 325 # Number of times the LSQ has become full, causing a stall system.cpu.iew.iewSquashCycles 162682073 # Number of cycles IEW is squashing system.cpu.iew.iewUnblockCycles 10344235 # Number of cycles IEW is unblocking -system.cpu.iew.lsq.thread.0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding -system.cpu.iew.lsq.thread.0.cacheBlocked 25 # Number of times an access to memory failed due to the cache being blocked -system.cpu.iew.lsq.thread.0.forwLoads 36704375 # Number of loads that had data forwarded from stores -system.cpu.iew.lsq.thread.0.ignoredResponses 1640 # Number of memory responses ignored because the instruction is squashed -system.cpu.iew.lsq.thread.0.invAddrLoads 0 # Number of loads ignored due to an invalid address -system.cpu.iew.lsq.thread.0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address -system.cpu.iew.lsq.thread.0.memOrderViolation 2659902 # Number of memory ordering violations -system.cpu.iew.lsq.thread.0.rescheduledLoads 95 # Number of loads that were rescheduled -system.cpu.iew.lsq.thread.0.squashedLoads 314908964 # Number of loads squashed -system.cpu.iew.lsq.thread.0.squashedStores 201953747 # Number of stores squashed +system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding +system.cpu.iew.lsq.thread0.cacheBlocked 25 # Number of times an access to memory failed due to the cache being blocked +system.cpu.iew.lsq.thread0.forwLoads 36704375 # Number of loads that had data forwarded from stores +system.cpu.iew.lsq.thread0.ignoredResponses 1640 # Number of memory responses ignored because the instruction is squashed +system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address +system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address +system.cpu.iew.lsq.thread0.memOrderViolation 2659902 # Number of memory ordering violations +system.cpu.iew.lsq.thread0.rescheduledLoads 95 # Number of loads that were rescheduled +system.cpu.iew.lsq.thread0.squashedLoads 314908964 # Number of loads squashed +system.cpu.iew.lsq.thread0.squashedStores 201953747 # Number of stores squashed system.cpu.iew.memOrderViolationEvents 2659902 # Number of memory order violations system.cpu.iew.predictedNotTakenIncorrect 7823566 # Number of branches that were predicted not taken incorrectly system.cpu.iew.predictedTakenIncorrect 38670994 # Number of branches that were predicted taken incorrectly |