diff options
Diffstat (limited to 'tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt')
| -rw-r--r-- | tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt | 78 |
1 files changed, 39 insertions, 39 deletions
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt index c03fa7e28..0df85f934 100644 --- a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt +++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt @@ -1,66 +1,66 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 6003103 # Simulator instruction rate (inst/s) -host_mem_usage 195756 # Number of bytes of host memory used -host_seconds 303.14 # Real time elapsed on the host -host_tick_rate 3012433327 # Simulator tick rate (ticks/s) -sim_freq 1000000000000 # Frequency of simulated ticks -sim_insts 1819780127 # Number of instructions simulated sim_seconds 0.913189 # Number of seconds simulated sim_ticks 913189263000 # Number of ticks simulated -system.cpu.dtb.data_accesses 611922547 # DTB accesses -system.cpu.dtb.data_acv 0 # DTB access violations -system.cpu.dtb.data_hits 605324165 # DTB hits -system.cpu.dtb.data_misses 6598382 # DTB misses -system.cpu.dtb.fetch_accesses 0 # ITB accesses -system.cpu.dtb.fetch_acv 0 # ITB acv +sim_freq 1000000000000 # Frequency of simulated ticks +host_inst_rate 3384825 # Simulator instruction rate (inst/s) +host_tick_rate 1698548817 # Simulator tick rate (ticks/s) +host_mem_usage 183944 # Number of bytes of host memory used +host_seconds 537.63 # Real time elapsed on the host +sim_insts 1819780127 # Number of instructions simulated system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses -system.cpu.dtb.read_accesses 449492741 # DTB read accesses -system.cpu.dtb.read_acv 0 # DTB read access violations +system.cpu.dtb.fetch_acv 0 # ITB acv +system.cpu.dtb.fetch_accesses 0 # ITB accesses system.cpu.dtb.read_hits 444595663 # DTB read hits system.cpu.dtb.read_misses 4897078 # DTB read misses -system.cpu.dtb.write_accesses 162429806 # DTB write accesses -system.cpu.dtb.write_acv 0 # DTB write access violations +system.cpu.dtb.read_acv 0 # DTB read access violations +system.cpu.dtb.read_accesses 449492741 # DTB read accesses system.cpu.dtb.write_hits 160728502 # DTB write hits system.cpu.dtb.write_misses 1701304 # DTB write misses -system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.itb.data_accesses 0 # DTB accesses -system.cpu.itb.data_acv 0 # DTB access violations -system.cpu.itb.data_hits 0 # DTB hits -system.cpu.itb.data_misses 0 # DTB misses -system.cpu.itb.fetch_accesses 1826378527 # ITB accesses -system.cpu.itb.fetch_acv 0 # ITB acv +system.cpu.dtb.write_acv 0 # DTB write access violations +system.cpu.dtb.write_accesses 162429806 # DTB write accesses +system.cpu.dtb.data_hits 605324165 # DTB hits +system.cpu.dtb.data_misses 6598382 # DTB misses +system.cpu.dtb.data_acv 0 # DTB access violations +system.cpu.dtb.data_accesses 611922547 # DTB accesses system.cpu.itb.fetch_hits 1826378509 # ITB hits system.cpu.itb.fetch_misses 18 # ITB misses -system.cpu.itb.read_accesses 0 # DTB read accesses -system.cpu.itb.read_acv 0 # DTB read access violations +system.cpu.itb.fetch_acv 0 # ITB acv +system.cpu.itb.fetch_accesses 1826378527 # ITB accesses system.cpu.itb.read_hits 0 # DTB read hits system.cpu.itb.read_misses 0 # DTB read misses -system.cpu.itb.write_accesses 0 # DTB write accesses -system.cpu.itb.write_acv 0 # DTB write access violations +system.cpu.itb.read_acv 0 # DTB read access violations +system.cpu.itb.read_accesses 0 # DTB read accesses system.cpu.itb.write_hits 0 # DTB write hits system.cpu.itb.write_misses 0 # DTB write misses -system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles +system.cpu.itb.write_acv 0 # DTB write access violations +system.cpu.itb.write_accesses 0 # DTB write accesses +system.cpu.itb.data_hits 0 # DTB hits +system.cpu.itb.data_misses 0 # DTB misses +system.cpu.itb.data_acv 0 # DTB access violations +system.cpu.itb.data_accesses 0 # DTB accesses +system.cpu.workload.num_syscalls 29 # Number of system calls system.cpu.numCycles 1826378527 # number of cpu cycles simulated -system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu.num_busy_cycles 1826378527 # Number of busy cycles -system.cpu.num_conditional_control_insts 164021647 # number of instructions that are conditional controls -system.cpu.num_fp_alu_accesses 805526 # Number of float alu accesses -system.cpu.num_fp_insts 805526 # number of float instructions -system.cpu.num_fp_register_reads 357 # number of times the floating registers were read -system.cpu.num_fp_register_writes 345 # number of times the floating registers were written -system.cpu.num_func_calls 33534877 # number of times a function call or return occured -system.cpu.num_idle_cycles 0 # Number of idle cycles +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.num_insts 1819780127 # Number of instructions executed system.cpu.num_int_alu_accesses 1725565901 # Number of integer alu accesses +system.cpu.num_fp_alu_accesses 805526 # Number of float alu accesses +system.cpu.num_func_calls 33534877 # number of times a function call or return occured +system.cpu.num_conditional_control_insts 164021647 # number of instructions that are conditional controls system.cpu.num_int_insts 1725565901 # number of integer instructions +system.cpu.num_fp_insts 805526 # number of float instructions system.cpu.num_int_register_reads 2347934659 # number of times the integer registers were read system.cpu.num_int_register_writes 1376202618 # number of times the integer registers were written -system.cpu.num_load_insts 449492741 # Number of load instructions +system.cpu.num_fp_register_reads 357 # number of times the floating registers were read +system.cpu.num_fp_register_writes 345 # number of times the floating registers were written system.cpu.num_mem_refs 611922547 # number of memory refs +system.cpu.num_load_insts 449492741 # Number of load instructions system.cpu.num_store_insts 162429806 # Number of store instructions -system.cpu.workload.num_syscalls 29 # Number of system calls +system.cpu.num_idle_cycles 0 # Number of idle cycles +system.cpu.num_busy_cycles 1826378527 # Number of busy cycles +system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles +system.cpu.idle_fraction 0 # Percentage of idle cycles ---------- End Simulation Statistics ---------- |