summaryrefslogtreecommitdiff
path: root/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic
diff options
context:
space:
mode:
Diffstat (limited to 'tests/long/60.bzip2/ref/alpha/tru64/simple-atomic')
-rw-r--r--tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini2
-rwxr-xr-xtests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simerr3
-rwxr-xr-xtests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout11
-rw-r--r--tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt10
4 files changed, 16 insertions, 10 deletions
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
index 740b113f4..889a2c50f 100644
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
@@ -57,7 +57,7 @@ egid=100
env=
errout=cerr
euid=100
-executable=/proj/aatl_perfmod_arch/m5_binaries/cpu2000/binaries/alpha/tru64/bzip2
+executable=/chips/pd/randd/dist/cpu2000/binaries/alpha/tru64/bzip2
gid=100
input=cin
max_stack_size=67108864
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simerr b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simerr
index b2d79346c..67f69f09d 100755
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simerr
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simerr
@@ -1,2 +1,5 @@
warn: Sockets disabled, not accepting gdb connections
For more information see: http://www.m5sim.org/warn/d946bea6
+warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...)
+For more information see: http://www.m5sim.org/warn/5c5b547f
+hack: be nice to actually delete the event here
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout
index b436e5a76..5c31e9414 100755
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout
@@ -1,3 +1,5 @@
+Redirecting stdout to build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-atomic/simout
+Redirecting stderr to build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-atomic/simerr
M5 Simulator System
Copyright (c) 2001-2008
@@ -5,10 +7,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Feb 24 2010 23:12:40
-M5 revision 1a33ca29ec29 6980 default share-aware-test-update.patch tip qtip
-M5 started Feb 25 2010 03:01:37
-M5 executing on SC2B0619
+M5 compiled Nov 2 2010 21:30:55
+M5 revision 0af3760102ec+ 7713+ default qtip ext/alpha_prefetch.patch tip
+M5 started Nov 2 2010 21:35:16
+M5 executing on aus-bc2-b15
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
@@ -28,3 +30,4 @@ Uncompressing Data
Uncompressed data 1048576 bytes in length
Uncompressed data compared correctly
Tested 1MB buffer: OK!
+Exiting @ tick 913189263000 because target called exit()
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt
index 279d75547..0e81a5825 100644
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 1736234 # Simulator instruction rate (inst/s)
-host_mem_usage 184024 # Number of bytes of host memory used
-host_seconds 1048.12 # Real time elapsed on the host
-host_tick_rate 871264314 # Simulator tick rate (ticks/s)
+host_inst_rate 5747960 # Simulator instruction rate (inst/s)
+host_mem_usage 231948 # Number of bytes of host memory used
+host_seconds 316.60 # Real time elapsed on the host
+host_tick_rate 2884399053 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 1819780127 # Number of instructions simulated
sim_seconds 0.913189 # Number of seconds simulated
@@ -44,7 +44,7 @@ system.cpu.itb.write_misses 0 # DT
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 1826378527 # number of cpu cycles simulated
system.cpu.num_insts 1819780127 # Number of instructions executed
-system.cpu.num_refs 613169725 # Number of memory references
+system.cpu.num_refs 611922547 # Number of memory references
system.cpu.workload.PROG:num_syscalls 29 # Number of system calls
---------- End Simulation Statistics ----------