diff options
Diffstat (limited to 'tests/long/60.bzip2/ref/alpha')
| -rwxr-xr-x | tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout | 4 | ||||
| -rw-r--r-- | tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt | 28 |
2 files changed, 16 insertions, 16 deletions
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout index 489ef9061..4b8d5a543 100755 --- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout @@ -5,8 +5,8 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 19 2011 11:52:53 -M5 started Apr 19 2011 12:02:34 +M5 compiled Apr 21 2011 12:29:56 +M5 started Apr 21 2011 13:06:19 M5 executing on maize command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt index bd83aa84a..d22652a78 100644 --- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 279473 # Simulator instruction rate (inst/s) -host_mem_usage 204448 # Number of bytes of host memory used -host_seconds 6211.84 # Real time elapsed on the host -host_tick_rate 113004567 # Simulator tick rate (ticks/s) +host_inst_rate 172416 # Simulator instruction rate (inst/s) +host_mem_usage 207720 # Number of bytes of host memory used +host_seconds 10068.91 # Real time elapsed on the host +host_tick_rate 69716202 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1736043781 # Number of instructions simulated sim_seconds 0.701966 # Number of seconds simulated @@ -262,16 +262,16 @@ system.cpu.iew.iewIdleCycles 0 # Nu system.cpu.iew.iewLSQFullEvents 16282 # Number of times the LSQ has become full, causing a stall system.cpu.iew.iewSquashCycles 83930076 # Number of cycles IEW is squashing system.cpu.iew.iewUnblockCycles 949861 # Number of cycles IEW is unblocking -system.cpu.iew.lsq.thread.0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding -system.cpu.iew.lsq.thread.0.cacheBlocked 162061 # Number of times an access to memory failed due to the cache being blocked -system.cpu.iew.lsq.thread.0.forwLoads 39718780 # Number of loads that had data forwarded from stores -system.cpu.iew.lsq.thread.0.ignoredResponses 292481 # Number of memory responses ignored because the instruction is squashed -system.cpu.iew.lsq.thread.0.invAddrLoads 0 # Number of loads ignored due to an invalid address -system.cpu.iew.lsq.thread.0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address -system.cpu.iew.lsq.thread.0.memOrderViolation 198174 # Number of memory ordering violations -system.cpu.iew.lsq.thread.0.rescheduledLoads 20 # Number of loads that were rescheduled -system.cpu.iew.lsq.thread.0.squashedLoads 165817327 # Number of loads squashed -system.cpu.iew.lsq.thread.0.squashedStores 66687540 # Number of stores squashed +system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding +system.cpu.iew.lsq.thread0.cacheBlocked 162061 # Number of times an access to memory failed due to the cache being blocked +system.cpu.iew.lsq.thread0.forwLoads 39718780 # Number of loads that had data forwarded from stores +system.cpu.iew.lsq.thread0.ignoredResponses 292481 # Number of memory responses ignored because the instruction is squashed +system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address +system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address +system.cpu.iew.lsq.thread0.memOrderViolation 198174 # Number of memory ordering violations +system.cpu.iew.lsq.thread0.rescheduledLoads 20 # Number of loads that were rescheduled +system.cpu.iew.lsq.thread0.squashedLoads 165817327 # Number of loads squashed +system.cpu.iew.lsq.thread0.squashedStores 66687540 # Number of stores squashed system.cpu.iew.memOrderViolationEvents 198174 # Number of memory order violations system.cpu.iew.predictedNotTakenIncorrect 3374280 # Number of branches that were predicted not taken incorrectly system.cpu.iew.predictedTakenIncorrect 18296998 # Number of branches that were predicted taken incorrectly |