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-rw-r--r--tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini10
-rwxr-xr-xtests/long/60.bzip2/ref/alpha/tru64/inorder-timing/simout6
-rw-r--r--tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/stats.txt19
-rw-r--r--tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini8
-rwxr-xr-xtests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout6
-rw-r--r--tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt19
-rw-r--r--tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini13
-rwxr-xr-xtests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout8
-rw-r--r--tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt19
-rw-r--r--tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini11
-rwxr-xr-xtests/long/60.bzip2/ref/alpha/tru64/simple-timing/simout8
-rw-r--r--tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stats.txt19
12 files changed, 100 insertions, 46 deletions
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini b/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini
index e32660b85..0d09e2e14 100644
--- a/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini
+++ b/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini
@@ -10,6 +10,7 @@ type=System
children=cpu membus physmem
mem_mode=atomic
memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=InOrderCPU
@@ -182,7 +184,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
[system.cpu.toL2Bus]
type=Bus
@@ -205,7 +207,7 @@ egid=100
env=
errout=cerr
euid=100
-executable=/chips/pd/randd/dist/cpu2000/binaries/alpha/tru64/bzip2
+executable=/dist/m5/cpu2000/binaries/alpha/tru64/bzip2
gid=100
input=cin
max_stack_size=67108864
@@ -224,7 +226,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@@ -234,5 +236,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/simout b/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/simout
index 1fce660ea..8bc14bb8a 100755
--- a/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/simout
+++ b/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/simout
@@ -1,9 +1,9 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 8 2011 15:00:53
-gem5 started Jul 8 2011 17:14:45
-gem5 executing on u200439-lin.austin.arm.com
+gem5 compiled Jan 23 2012 04:48:33
+gem5 started Jan 23 2012 05:42:50
+gem5 executing on zizzer
command line: build/ALPHA_SE/gem5.opt -d build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/inorder-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/inorder-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/stats.txt b/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/stats.txt
index 48a5816be..bf815a6e1 100644
--- a/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/stats.txt
+++ b/tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 1.009857 # Number of seconds simulated
sim_ticks 1009857089500 # Number of ticks simulated
+final_tick 1009857089500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 45175 # Simulator instruction rate (inst/s)
-host_tick_rate 25069239 # Simulator tick rate (ticks/s)
-host_mem_usage 245844 # Number of bytes of host memory used
-host_seconds 40282.72 # Real time elapsed on the host
+host_inst_rate 102085 # Simulator instruction rate (inst/s)
+host_tick_rate 56650413 # Simulator tick rate (ticks/s)
+host_mem_usage 208040 # Number of bytes of host memory used
+host_seconds 17826.12 # Real time elapsed on the host
sim_insts 1819780127 # Number of instructions simulated
+system.physmem.bytes_read 172617984 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 54912 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 74938304 # Number of bytes written to this memory
+system.physmem.num_reads 2697156 # Number of read requests responded to by this memory
+system.physmem.num_writes 1170911 # Number of write requests responded to by this memory
+system.physmem.num_other 0 # Number of other requests responded to by this memory
+system.physmem.bw_read 170933081 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 54376 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 74206841 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 245139922 # Total bandwidth to/from this memory (bytes/s)
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
index a21027897..4951679e2 100644
--- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
@@ -10,6 +10,7 @@ type=System
children=cpu membus physmem
mem_mode=atomic
memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=DerivO3CPU
@@ -477,7 +479,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
[system.cpu.toL2Bus]
type=Bus
@@ -519,7 +521,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@@ -529,5 +531,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout
index a891031f9..35ea78ab1 100755
--- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout
+++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Aug 20 2011 16:10:02
-gem5 started Aug 20 2011 21:33:03
+gem5 compiled Jan 23 2012 04:48:33
+gem5 started Jan 23 2012 05:43:49
gem5 executing on zizzer
-command line: ./build/ALPHA_SE/gem5.opt -d build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/o3-timing
+command line: build/ALPHA_SE/gem5.opt -d build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt
index 73dcce945..3e098da07 100644
--- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.615292 # Number of seconds simulated
sim_ticks 615292058500 # Number of ticks simulated
+final_tick 615292058500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 150883 # Simulator instruction rate (inst/s)
-host_tick_rate 53476218 # Simulator tick rate (ticks/s)
-host_mem_usage 211804 # Number of bytes of host memory used
-host_seconds 11505.90 # Real time elapsed on the host
+host_inst_rate 151558 # Simulator instruction rate (inst/s)
+host_tick_rate 53715526 # Simulator tick rate (ticks/s)
+host_mem_usage 208624 # Number of bytes of host memory used
+host_seconds 11454.64 # Real time elapsed on the host
sim_insts 1736043781 # Number of instructions simulated
+system.physmem.bytes_read 173080384 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 60288 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 74996480 # Number of bytes written to this memory
+system.physmem.num_reads 2704381 # Number of read requests responded to by this memory
+system.physmem.num_writes 1171820 # Number of write requests responded to by this memory
+system.physmem.num_other 0 # Number of other requests responded to by this memory
+system.physmem.bw_read 281297933 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 97983 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 121887612 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 403185545 # Total bandwidth to/from this memory (bytes/s)
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
index e886c5917..52ac7c920 100644
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini
@@ -9,6 +9,8 @@ time_sync_spin_threshold=100000000
type=System
children=cpu membus physmem
mem_mode=atomic
+memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -17,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=AtomicSimpleCPU
@@ -44,8 +47,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
-dcache_port=system.membus.port[2]
-icache_port=system.membus.port[1]
+dcache_port=system.membus.port[3]
+icache_port=system.membus.port[2]
[system.cpu.dtb]
type=AlphaTLB
@@ -61,7 +64,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=bzip2 input.source 1
-cwd=build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-atomic
+cwd=build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-atomic
egid=100
env=
errout=cerr
@@ -85,7 +88,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
+port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
[system.physmem]
type=PhysicalMemory
@@ -95,5 +98,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout
index eccdc3c2f..3465b9fda 100755
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jun 19 2011 06:59:13
-gem5 started Jun 20 2011 12:23:57
-gem5 executing on m60-009.pool
-command line: build/ALPHA_SE/gem5.fast -d build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-atomic
+gem5 compiled Jan 23 2012 04:48:33
+gem5 started Jan 23 2012 05:45:21
+gem5 executing on zizzer
+command line: build/ALPHA_SE/gem5.opt -d build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt
index 0df85f934..1f32f6942 100644
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.913189 # Number of seconds simulated
sim_ticks 913189263000 # Number of ticks simulated
+final_tick 913189263000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 3384825 # Simulator instruction rate (inst/s)
-host_tick_rate 1698548817 # Simulator tick rate (ticks/s)
-host_mem_usage 183944 # Number of bytes of host memory used
-host_seconds 537.63 # Real time elapsed on the host
+host_inst_rate 4221832 # Simulator instruction rate (inst/s)
+host_tick_rate 2118570165 # Simulator tick rate (ticks/s)
+host_mem_usage 198896 # Number of bytes of host memory used
+host_seconds 431.04 # Real time elapsed on the host
sim_insts 1819780127 # Number of instructions simulated
+system.physmem.bytes_read 9280309971 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 7305514036 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 827777307 # Number of bytes written to this memory
+system.physmem.num_reads 2270974172 # Number of read requests responded to by this memory
+system.physmem.num_writes 160728502 # Number of write requests responded to by this memory
+system.physmem.num_other 0 # Number of other requests responded to by this memory
+system.physmem.bw_read 10162526375 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 7999999926 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 906468506 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 11068994882 # Total bandwidth to/from this memory (bytes/s)
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini b/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini
index 6ccdf7868..b74c06509 100644
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini
@@ -9,6 +9,8 @@ time_sync_spin_threshold=100000000
type=System
children=cpu membus physmem
mem_mode=atomic
+memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -17,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=TimingSimpleCPU
@@ -146,7 +149,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
[system.cpu.toL2Bus]
type=Bus
@@ -164,7 +167,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=bzip2 input.source 1
-cwd=build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-timing
+cwd=build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-timing
egid=100
env=
errout=cerr
@@ -188,7 +191,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@@ -198,5 +201,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/simout b/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/simout
index 1b40535c5..5e40861f7 100755
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/simout
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jun 19 2011 06:59:13
-gem5 started Jun 20 2011 12:54:26
-gem5 executing on m60-009.pool
-command line: build/ALPHA_SE/gem5.fast -d build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/simple-timing
+gem5 compiled Jan 23 2012 04:48:33
+gem5 started Jan 23 2012 05:52:43
+gem5 executing on zizzer
+command line: build/ALPHA_SE/gem5.opt -d build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stats.txt
index 03eecacc7..99a911858 100644
--- a/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stats.txt
+++ b/tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 2.663444 # Number of seconds simulated
sim_ticks 2663443716000 # Number of ticks simulated
+final_tick 2663443716000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1486818 # Simulator instruction rate (inst/s)
-host_tick_rate 2176118189 # Simulator tick rate (ticks/s)
-host_mem_usage 192584 # Number of bytes of host memory used
-host_seconds 1223.94 # Real time elapsed on the host
+host_inst_rate 1948044 # Simulator instruction rate (inst/s)
+host_tick_rate 2851171142 # Simulator tick rate (ticks/s)
+host_mem_usage 207608 # Number of bytes of host memory used
+host_seconds 934.16 # Real time elapsed on the host
sim_insts 1819780127 # Number of instructions simulated
+system.physmem.bytes_read 172614208 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 51328 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 74939072 # Number of bytes written to this memory
+system.physmem.num_reads 2697097 # Number of read requests responded to by this memory
+system.physmem.num_writes 1170923 # Number of write requests responded to by this memory
+system.physmem.num_other 0 # Number of other requests responded to by this memory
+system.physmem.bw_read 64808656 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 19271 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 28136158 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 92944814 # Total bandwidth to/from this memory (bytes/s)
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv