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-rw-r--r--tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini4
-rwxr-xr-xtests/long/60.bzip2/ref/x86/linux/simple-atomic/simout10
-rw-r--r--tests/long/60.bzip2/ref/x86/linux/simple-atomic/stats.txt8
-rw-r--r--tests/long/60.bzip2/ref/x86/linux/simple-timing/config.ini4
-rwxr-xr-xtests/long/60.bzip2/ref/x86/linux/simple-timing/simout10
-rw-r--r--tests/long/60.bzip2/ref/x86/linux/simple-timing/stats.txt8
6 files changed, 22 insertions, 22 deletions
diff --git a/tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini b/tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini
index 5ffe1d191..8cd09b7fa 100644
--- a/tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini
@@ -39,11 +39,11 @@ dcache_port=system.membus.port[2]
icache_port=system.membus.port[1]
[system.cpu.dtb]
-type=X86DTB
+type=X86TLB
size=64
[system.cpu.itb]
-type=X86ITB
+type=X86TLB
size=64
[system.cpu.tracer]
diff --git a/tests/long/60.bzip2/ref/x86/linux/simple-atomic/simout b/tests/long/60.bzip2/ref/x86/linux/simple-atomic/simout
index 66e6ec11e..8766090d3 100755
--- a/tests/long/60.bzip2/ref/x86/linux/simple-atomic/simout
+++ b/tests/long/60.bzip2/ref/x86/linux/simple-atomic/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Feb 23 2009 23:45:19
-M5 revision 046e9580158a+ 5888+ default qtip tip delayedmissstats.patch
-M5 started Feb 23 2009 23:48:10
-M5 executing on tater
-command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/60.bzip2/x86/linux/simple-atomic -re tests/run.py long/60.bzip2/x86/linux/simple-atomic
+M5 compiled Apr 8 2009 12:30:02
+M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
+M5 started Apr 8 2009 13:09:24
+M5 executing on maize
+command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/60.bzip2/x86/linux/simple-atomic -re tests/run.py build/X86_SE/tests/fast/long/60.bzip2/x86/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
spec_init
diff --git a/tests/long/60.bzip2/ref/x86/linux/simple-atomic/stats.txt b/tests/long/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
index a2ce3d743..051f5b326 100644
--- a/tests/long/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/long/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 1367500 # Simulator instruction rate (inst/s)
-host_mem_usage 197040 # Number of bytes of host memory used
-host_seconds 3402.69 # Real time elapsed on the host
-host_tick_rate 831449663 # Simulator tick rate (ticks/s)
+host_inst_rate 2554726 # Simulator instruction rate (inst/s)
+host_mem_usage 199616 # Number of bytes of host memory used
+host_seconds 1821.40 # Real time elapsed on the host
+host_tick_rate 1553291459 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 4653176258 # Number of instructions simulated
sim_seconds 2.829164 # Number of seconds simulated
diff --git a/tests/long/60.bzip2/ref/x86/linux/simple-timing/config.ini b/tests/long/60.bzip2/ref/x86/linux/simple-timing/config.ini
index 4d80734e6..8499b0423 100644
--- a/tests/long/60.bzip2/ref/x86/linux/simple-timing/config.ini
+++ b/tests/long/60.bzip2/ref/x86/linux/simple-timing/config.ini
@@ -68,7 +68,7 @@ cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
[system.cpu.dtb]
-type=X86DTB
+type=X86TLB
size=64
[system.cpu.icache]
@@ -104,7 +104,7 @@ cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
[system.cpu.itb]
-type=X86ITB
+type=X86TLB
size=64
[system.cpu.l2cache]
diff --git a/tests/long/60.bzip2/ref/x86/linux/simple-timing/simout b/tests/long/60.bzip2/ref/x86/linux/simple-timing/simout
index bdea83ec4..0d8772663 100755
--- a/tests/long/60.bzip2/ref/x86/linux/simple-timing/simout
+++ b/tests/long/60.bzip2/ref/x86/linux/simple-timing/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Feb 24 2009 01:30:29
-M5 revision 652016638b82 5907 default qtip tip nofetchonmicrostats.patch
-M5 started Feb 24 2009 01:30:32
-M5 executing on tater
-command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/60.bzip2/x86/linux/simple-timing -re tests/run.py long/60.bzip2/x86/linux/simple-timing
+M5 compiled Apr 8 2009 12:30:02
+M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
+M5 started Apr 8 2009 13:02:28
+M5 executing on maize
+command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/60.bzip2/x86/linux/simple-timing -re tests/run.py build/X86_SE/tests/fast/long/60.bzip2/x86/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
spec_init
diff --git a/tests/long/60.bzip2/ref/x86/linux/simple-timing/stats.txt b/tests/long/60.bzip2/ref/x86/linux/simple-timing/stats.txt
index 55231f8a8..bca5f9f6d 100644
--- a/tests/long/60.bzip2/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/long/60.bzip2/ref/x86/linux/simple-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 929786 # Simulator instruction rate (inst/s)
-host_mem_usage 204596 # Number of bytes of host memory used
-host_seconds 5004.56 # Real time elapsed on the host
-host_tick_rate 1196520405 # Simulator tick rate (ticks/s)
+host_inst_rate 1632111 # Simulator instruction rate (inst/s)
+host_mem_usage 207156 # Number of bytes of host memory used
+host_seconds 2851.02 # Real time elapsed on the host
+host_tick_rate 2100325473 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 4653176258 # Number of instructions simulated
sim_seconds 5.988064 # Number of seconds simulated