diff options
Diffstat (limited to 'tests/long/70.twolf/ref/arm/linux/simple-atomic')
3 files changed, 24 insertions, 26 deletions
diff --git a/tests/long/70.twolf/ref/arm/linux/simple-atomic/config.ini b/tests/long/70.twolf/ref/arm/linux/simple-atomic/config.ini index 283406dc2..b4f12af94 100644 --- a/tests/long/70.twolf/ref/arm/linux/simple-atomic/config.ini +++ b/tests/long/70.twolf/ref/arm/linux/simple-atomic/config.ini @@ -66,7 +66,7 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/cpu2000/binaries/arm/linux/twolf +executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/twolf gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/70.twolf/ref/arm/linux/simple-atomic/simout b/tests/long/70.twolf/ref/arm/linux/simple-atomic/simout index c50fadfb0..46b5d4995 100755 --- a/tests/long/70.twolf/ref/arm/linux/simple-atomic/simout +++ b/tests/long/70.twolf/ref/arm/linux/simple-atomic/simout @@ -5,13 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Feb 7 2011 01:56:16 -M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip -M5 started Feb 7 2011 01:56:35 -M5 executing on burrito +M5 compiled Mar 11 2011 20:10:09 +M5 revision 4decc284606a 8095 default qtip tip ext/update_add_stats.patch +M5 started Mar 11 2011 21:03:59 +M5 executing on u200439-lin.austin.arm.com command line: build/ARM_SE/m5.fast -d build/ARM_SE/tests/fast/long/70.twolf/arm/linux/simple-atomic -re tests/run.py build/ARM_SE/tests/fast/long/70.twolf/arm/linux/simple-atomic -Couldn't unlink build/ARM_SE/tests/fast/long/70.twolf/arm/linux/simple-atomic/smred.sav -Couldn't unlink build/ARM_SE/tests/fast/long/70.twolf/arm/linux/simple-atomic/smred.sv2 Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... @@ -28,4 +26,4 @@ info: Increasing stack size by one page. 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 -122 123 124 Exiting @ tick 102180734000 because target called exit() +122 123 124 Exiting @ tick 103106771000 because target called exit() diff --git a/tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt b/tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt index 4a204d0cd..a560430fc 100644 --- a/tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt +++ b/tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt @@ -1,13 +1,13 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1012006 # Simulator instruction rate (inst/s) -host_mem_usage 232796 # Number of bytes of host memory used -host_seconds 184.60 # Real time elapsed on the host -host_tick_rate 553516772 # Simulator tick rate (ticks/s) +host_inst_rate 1749088 # Simulator instruction rate (inst/s) +host_mem_usage 249684 # Number of bytes of host memory used +host_seconds 107.87 # Real time elapsed on the host +host_tick_rate 955856938 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks -sim_insts 186818826 # Number of instructions simulated -sim_seconds 0.102181 # Number of seconds simulated -sim_ticks 102180734000 # Number of ticks simulated +sim_insts 188670900 # Number of instructions simulated +sim_seconds 0.103107 # Number of seconds simulated +sim_ticks 103106771000 # Number of ticks simulated system.cpu.dtb.accesses 0 # DTB accesses system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions @@ -52,24 +52,24 @@ system.cpu.itb.write_accesses 0 # DT system.cpu.itb.write_hits 0 # DTB write hits system.cpu.itb.write_misses 0 # DTB write misses system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles -system.cpu.numCycles 204361469 # number of cpu cycles simulated +system.cpu.numCycles 206213543 # number of cpu cycles simulated system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu.num_busy_cycles 204361469 # Number of busy cycles -system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls +system.cpu.num_busy_cycles 206213543 # Number of busy cycles +system.cpu.num_conditional_control_insts 31909249 # number of instructions that are conditional controls system.cpu.num_fp_alu_accesses 1752310 # Number of float alu accesses system.cpu.num_fp_insts 1752310 # number of float instructions system.cpu.num_fp_register_reads 2822225 # number of times the floating registers were read system.cpu.num_fp_register_writes 2378039 # number of times the floating registers were written -system.cpu.num_func_calls 0 # number of times a function call or return occured +system.cpu.num_func_calls 3663001 # number of times a function call or return occured system.cpu.num_idle_cycles 0 # Number of idle cycles -system.cpu.num_insts 186818826 # Number of instructions executed -system.cpu.num_int_alu_accesses 148453796 # Number of integer alu accesses -system.cpu.num_int_insts 148453796 # number of integer instructions -system.cpu.num_int_register_reads 440904784 # number of times the integer registers were read -system.cpu.num_int_register_writes 179338779 # number of times the integer registers were written -system.cpu.num_load_insts 29867211 # Number of load instructions -system.cpu.num_mem_refs 42511846 # number of memory refs +system.cpu.num_insts 188670900 # Number of instructions executed +system.cpu.num_int_alu_accesses 150261055 # Number of integer alu accesses +system.cpu.num_int_insts 150261055 # number of integer instructions +system.cpu.num_int_register_reads 444541710 # number of times the integer registers were read +system.cpu.num_int_register_writes 181190852 # number of times the integer registers were written +system.cpu.num_load_insts 29849485 # Number of load instructions +system.cpu.num_mem_refs 42494120 # number of memory refs system.cpu.num_store_insts 12644635 # Number of store instructions system.cpu.workload.PROG:num_syscalls 400 # Number of system calls |