diff options
Diffstat (limited to 'tests/long/70.twolf/ref/arm/linux/simple-timing/stats.txt')
| -rw-r--r-- | tests/long/70.twolf/ref/arm/linux/simple-timing/stats.txt | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/tests/long/70.twolf/ref/arm/linux/simple-timing/stats.txt b/tests/long/70.twolf/ref/arm/linux/simple-timing/stats.txt index 6db773218..f93740715 100644 --- a/tests/long/70.twolf/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/70.twolf/ref/arm/linux/simple-timing/stats.txt @@ -1,11 +1,11 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1300701 # Simulator instruction rate (inst/s) -host_mem_usage 208132 # Number of bytes of host memory used -host_seconds 143.02 # Real time elapsed on the host -host_tick_rate 1622346657 # Simulator tick rate (ticks/s) +host_inst_rate 1662173 # Simulator instruction rate (inst/s) +host_mem_usage 213456 # Number of bytes of host memory used +host_seconds 112.10 # Real time elapsed on the host +host_tick_rate 2069793412 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks -sim_insts 186027114 # Number of instructions simulated +sim_insts 186333855 # Number of instructions simulated sim_seconds 0.232029 # Number of seconds simulated sim_ticks 232029492000 # Number of ticks simulated system.cpu.dcache.ReadReq_accesses 29640180 # number of ReadReq accesses(hits+misses) @@ -226,7 +226,7 @@ system.cpu.l2cache.warmup_cycle 0 # Cy system.cpu.l2cache.writebacks 0 # number of writebacks system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.numCycles 464058984 # number of cpu cycles simulated -system.cpu.num_insts 186027114 # Number of instructions executed +system.cpu.num_insts 186333855 # Number of instructions executed system.cpu.num_refs 42511846 # Number of memory references system.cpu.workload.PROG:num_syscalls 400 # Number of system calls |