diff options
Diffstat (limited to 'tests/long/70.twolf/ref/sparc/linux/simple-timing/m5stats.txt')
| -rw-r--r-- | tests/long/70.twolf/ref/sparc/linux/simple-timing/m5stats.txt | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-timing/m5stats.txt b/tests/long/70.twolf/ref/sparc/linux/simple-timing/m5stats.txt index bb82b8cc2..8855ab575 100644 --- a/tests/long/70.twolf/ref/sparc/linux/simple-timing/m5stats.txt +++ b/tests/long/70.twolf/ref/sparc/linux/simple-timing/m5stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1002711 # Simulator instruction rate (inst/s) -host_mem_usage 188412 # Number of bytes of host memory used -host_seconds 192.91 # Real time elapsed on the host -host_tick_rate 1401662479 # Simulator tick rate (ticks/s) +host_inst_rate 958305 # Simulator instruction rate (inst/s) +host_mem_usage 206472 # Number of bytes of host memory used +host_seconds 201.85 # Real time elapsed on the host +host_tick_rate 1339588721 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 193435005 # Number of instructions simulated sim_seconds 0.270398 # Number of seconds simulated @@ -239,7 +239,7 @@ system.cpu.l2cache.total_refs 8679 # To system.cpu.l2cache.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.writebacks 0 # number of writebacks system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles -system.cpu.numCycles 270397899000 # number of cpu cycles simulated +system.cpu.numCycles 540795798 # number of cpu cycles simulated system.cpu.num_insts 193435005 # Number of instructions executed system.cpu.num_refs 76733003 # Number of memory references system.cpu.workload.PROG:num_syscalls 396 # Number of system calls |