diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini')
| -rw-r--r-- | tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini | 245 |
1 files changed, 234 insertions, 11 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini index aa0a7c43b..42d27bf88 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini @@ -15,10 +15,12 @@ boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/work/gem5/dist/binaries/console +console=/arm/projectscratch/randd/systems/dist/binaries/console +default_p_state=UNDEFINED eventq_index=0 +exit_on_work_items=false init_param=0 -kernel=/work/gem5/dist/binaries/vmlinux +kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 @@ -28,11 +30,17 @@ memories=system.physmem mmap_using_noreserve=false multi_thread=false num_work_ids=16 -pal=/work/gem5/dist/binaries/ts_osfpal -readfile=/work/gem5/outgoing/gem5_2/tests/halt.sh +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal +power_model=Null +readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh symbolfile= system_rev=1024 system_type=34 +thermal_components= +thermal_model=Null work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 @@ -45,8 +53,13 @@ system_port=system.membus.slave[0] [system.bridge] type=Bridge clk_domain=system.clk_domain +default_p_state=UNDEFINED delay=50000 eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null ranges=8796093022208:18446744073709551615 req_size=16 resp_size=16 @@ -85,6 +98,7 @@ cpu_id=0 decodeToFetchDelay=1 decodeToRenameDelay=1 decodeWidth=8 +default_p_state=UNDEFINED dispatchWidth=8 do_checkpoint_insts=true do_quiesce=true @@ -121,6 +135,10 @@ numPhysIntRegs=256 numROBEntries=192 numRobs=1 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 renameToDecodeDelay=1 @@ -160,11 +178,18 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 +useIndirect=true [system.cpu.dcache] type=Cache @@ -173,13 +198,17 @@ addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -198,8 +227,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -522,13 +556,17 @@ addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -547,8 +585,13 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=32768 @@ -573,13 +616,17 @@ addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true hit_latency=20 is_read_only=false max_miss_count=0 mshrs=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=20 @@ -598,8 +645,13 @@ type=LRU assoc=8 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=4194304 @@ -607,9 +659,15 @@ size=4194304 type=CoherentXBar children=snoop_filter clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=0 frontend_latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +point_of_coherency=false +power_model=Null response_latency=1 snoop_filter=system.cpu.toL2Bus.snoop_filter snoop_response_latency=1 @@ -658,7 +716,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/work/gem5/dist/disks/linux-latest.img +image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img read_only=true [system.disk2] @@ -681,7 +739,7 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/work/gem5/dist/disks/linux-bigswap2.img +image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img read_only=true [system.dvfs_handler] @@ -700,9 +758,14 @@ sys=system [system.iobus] type=NoncoherentXBar clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=1 frontend_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null response_latency=2 use_default_range=false width=16 @@ -716,13 +779,17 @@ addr_ranges=0:134217727 assoc=8 clk_domain=system.clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 -forward_snoops=false hit_latency=50 is_read_only=false max_miss_count=0 mshrs=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=50 @@ -741,8 +808,13 @@ type=LRU assoc=8 block_size=64 clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=50 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=1024 @@ -750,9 +822,15 @@ size=1024 type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=4 frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +point_of_coherency=true +power_model=Null response_latency=2 snoop_filter=Null snoop_response_latency=4 @@ -766,11 +844,16 @@ slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side [system.membus.badaddr_responder] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=0 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=true ret_data16=65535 ret_data32=4294967295 @@ -815,6 +898,7 @@ burst_length=8 channels=1 clk_domain=system.clk_domain conf_table_reported=true +default_p_state=UNDEFINED device_bus_width=8 device_rowbuffer_size=1024 device_size=536870912 @@ -826,7 +910,11 @@ max_accesses_per_row=16 mem_sched_policy=frfcfs min_writes_per_switch=16 null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 page_policy=open_adaptive +power_model=Null range=0:134217727 ranks_per_channel=2 read_buffer_size=32 @@ -868,7 +956,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/work/gem5/dist/disks/linux-latest.img +image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img read_only=true [system.terminal] @@ -890,11 +978,16 @@ system=system type=AlphaBackdoor clk_domain=system.clk_domain cpu=system.cpu +default_p_state=UNDEFINED disk=system.simple_disk eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804682956800 pio_latency=100000 platform=system.tsunami +power_model=Null system=system terminal=system.terminal pio=system.iobus.master[24] @@ -902,9 +995,14 @@ pio=system.iobus.master[24] [system.tsunami.cchip] type=TsunamiCChip clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8803072344064 pio_latency=100000 +power_model=Null system=system tsunami=system.tsunami pio=system.iobus.master[0] @@ -985,6 +1083,7 @@ SubsystemVendorID=0 VendorID=4107 clk_domain=system.clk_domain config_latency=20000 +default_p_state=UNDEFINED dma_data_free=false dma_desc_free=false dma_no_allocate=true @@ -996,10 +1095,14 @@ eventq_index=0 hardware_address=00:90:00:00:00:01 host=system.tsunami.pchip intr_delay=10000000 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pci_bus=0 pci_dev=1 pci_func=0 pio_latency=30000 +power_model=Null rss=false rx_delay=1000000 rx_fifo_size=524288 @@ -1015,11 +1118,16 @@ pio=system.iobus.master[26] [system.tsunami.fake_OROM] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8796093677568 pio_latency=100000 pio_size=393216 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1033,11 +1141,16 @@ pio=system.iobus.master[8] [system.tsunami.fake_ata0] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848432 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1051,11 +1164,16 @@ pio=system.iobus.master[19] [system.tsunami.fake_ata1] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848304 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1069,11 +1187,16 @@ pio=system.iobus.master[20] [system.tsunami.fake_pnp_addr] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848569 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1087,11 +1210,16 @@ pio=system.iobus.master[9] [system.tsunami.fake_pnp_read0] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848451 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1105,11 +1233,16 @@ pio=system.iobus.master[11] [system.tsunami.fake_pnp_read1] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848515 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1123,11 +1256,16 @@ pio=system.iobus.master[12] [system.tsunami.fake_pnp_read2] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848579 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1141,11 +1279,16 @@ pio=system.iobus.master[13] [system.tsunami.fake_pnp_read3] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848643 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1159,11 +1302,16 @@ pio=system.iobus.master[14] [system.tsunami.fake_pnp_read4] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848707 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1177,11 +1325,16 @@ pio=system.iobus.master[15] [system.tsunami.fake_pnp_read5] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848771 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1195,11 +1348,16 @@ pio=system.iobus.master[16] [system.tsunami.fake_pnp_read6] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848835 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1213,11 +1371,16 @@ pio=system.iobus.master[17] [system.tsunami.fake_pnp_read7] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848899 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1231,11 +1394,16 @@ pio=system.iobus.master[18] [system.tsunami.fake_pnp_write] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615850617 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1249,11 +1417,16 @@ pio=system.iobus.master[10] [system.tsunami.fake_ppc] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848891 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1267,11 +1440,16 @@ pio=system.iobus.master[7] [system.tsunami.fake_sm_chip] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848816 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1285,11 +1463,16 @@ pio=system.iobus.master[2] [system.tsunami.fake_uart1] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848696 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1303,11 +1486,16 @@ pio=system.iobus.master[3] [system.tsunami.fake_uart2] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848936 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1321,11 +1509,16 @@ pio=system.iobus.master[4] [system.tsunami.fake_uart3] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848680 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1339,11 +1532,16 @@ pio=system.iobus.master[5] [system.tsunami.fake_uart4] type=IsaFake clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 fake_mem=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848944 pio_latency=100000 pio_size=8 +power_model=Null ret_bad_addr=false ret_data16=65535 ret_data32=4294967295 @@ -1357,10 +1555,15 @@ pio=system.iobus.master[6] [system.tsunami.fb] type=BadDevice clk_domain=system.clk_domain +default_p_state=UNDEFINED devicename=FrameBuffer eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848912 pio_latency=100000 +power_model=Null system=system pio=system.iobus.master[21] @@ -1441,14 +1644,19 @@ VendorID=32902 clk_domain=system.clk_domain config_latency=20000 ctrl_offset=0 +default_p_state=UNDEFINED disks=system.disk0 system.disk2 eventq_index=0 host=system.tsunami.pchip io_shift=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pci_bus=0 pci_dev=0 pci_func=0 pio_latency=30000 +power_model=Null system=system dma=system.iobus.slave[1] pio=system.iobus.master[25] @@ -1456,10 +1664,15 @@ pio=system.iobus.master[25] [system.tsunami.io] type=TsunamiIO clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 frequency=976562500 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615847936 pio_latency=100000 +power_model=Null system=system time=Thu Jan 1 00:00:00 2009 tsunami=system.tsunami @@ -1472,13 +1685,18 @@ clk_domain=system.clk_domain conf_base=8804649402368 conf_device_bits=8 conf_size=16777216 +default_p_state=UNDEFINED eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pci_dma_base=0 pci_mem_base=8796093022208 pci_pio_base=8804615847936 pio_addr=8802535473152 pio_latency=100000 platform=system.tsunami +power_model=Null system=system tsunami=system.tsunami pio=system.iobus.master[1] @@ -1486,10 +1704,15 @@ pio=system.iobus.master[1] [system.tsunami.uart] type=Uart8250 clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 pio_addr=8804615848952 pio_latency=100000 platform=system.tsunami +power_model=Null system=system terminal=system.terminal pio=system.iobus.master[23] |