diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/alpha')
12 files changed, 183 insertions, 95 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini index 9efbaffcd..aca399d8a 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini @@ -15,19 +15,20 @@ boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/dist/binaries/console +console=/home/stever/m5/m5_system_2.0b3/binaries/console eventq_index=0 init_param=0 -kernel=/dist/binaries/vmlinux +kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing mem_ranges=0:134217727 memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 -pal=/dist/binaries/ts_osfpal -readfile=/work/gem5.latest/tests/halt.sh +pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh symbolfile= system_rev=1024 system_type=34 @@ -149,7 +150,7 @@ dcache_port=system.cpu0.dcache.cpu_side icache_port=system.cpu0.icache.cpu_side [system.cpu0.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -163,7 +164,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu0.dcache] type=BaseCache @@ -171,6 +171,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -518,6 +519,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -655,7 +657,7 @@ dcache_port=system.cpu1.dcache.cpu_side icache_port=system.cpu1.icache.cpu_side [system.cpu1.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -669,7 +671,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu1.dcache] type=BaseCache @@ -677,6 +678,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -1024,6 +1026,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -1099,7 +1102,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.disk2] @@ -1122,7 +1125,7 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-bigswap2.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img read_only=true [system.dvfs_handler] @@ -1142,9 +1145,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.tsunami.pciconfig.pio master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma @@ -1155,6 +1160,7 @@ children=tags addr_ranges=0:134217727 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -1190,6 +1196,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -1224,11 +1231,14 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio master=system.bridge.slave system.physmem.port slave=system.system_port system.l2c.mem_side system.iocache.mem_side @@ -1278,7 +1288,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1338,7 +1348,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.terminal] @@ -1353,11 +1363,14 @@ port=3456 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false -width=8 +width=32 master=system.l2c.cpu_side slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout index c80d76784..7f9e2b29d 100755 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout @@ -1,13 +1,14 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:12:51 -gem5 started Oct 29 2014 09:21:02 -gem5 executing on u200540-lin -command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 09:01:06 +gem5 executing on phenom +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual + Global frequency set at 1000000000000 ticks per second -info: kernel located at: /dist/binaries/vmlinux +info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009 info: Entering event queue @ 0. Starting simulation... -info: Launching CPU 1 @ 119596000 -Exiting @ tick 1905067807000 because m5_exit instruction encountered +info: Launching CPU 1 @ 133655000 +Exiting @ tick 1904437574000 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt index a1e1dce04..5574bfb2b 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.904438 # Nu sim_ticks 1904437574000 # Number of ticks simulated final_tick 1904437574000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 150033 # Simulator instruction rate (inst/s) -host_op_rate 150033 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 5049661741 # Simulator tick rate (ticks/s) -host_mem_usage 379720 # Number of bytes of host memory used -host_seconds 377.14 # Real time elapsed on the host +host_inst_rate 143053 # Simulator instruction rate (inst/s) +host_op_rate 143053 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 4814720142 # Simulator tick rate (ticks/s) +host_mem_usage 313028 # Number of bytes of host memory used +host_seconds 395.54 # Real time elapsed on the host sim_insts 56583768 # Number of instructions simulated sim_ops 56583768 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -437,7 +437,7 @@ system.cpu0.iq.iqInstsAdded 53110388 # Nu system.cpu0.iq.iqNonSpecInstsAdded 1887245 # Number of non-speculative instructions added to the IQ system.cpu0.iq.iqInstsIssued 52243998 # Number of instructions issued system.cpu0.iq.iqSquashedInstsIssued 50112 # Number of squashed instructions issued -system.cpu0.iq.iqSquashedInstsExamined 6322079 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu0.iq.iqSquashedInstsExamined 6621677 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu0.iq.iqSquashedOperandsExamined 2924940 # Number of squashed operands that are examined and possibly removed from graph system.cpu0.iq.iqSquashedNonSpecRemoved 1298251 # Number of squashed non-spec instructions that were removed system.cpu0.iq.issued_per_cycle::samples 110234726 # Number of insts issued each cycle @@ -530,10 +530,10 @@ system.cpu0.iq.rate 0.453068 # In system.cpu0.iq.fu_busy_cnt 970450 # FU busy when requested system.cpu0.iq.fu_busy_rate 0.018575 # FU busy rate (busy events/executed inst) system.cpu0.iq.int_inst_queue_reads 215148578 # Number of integer instruction queue reads -system.cpu0.iq.int_inst_queue_writes 61059123 # Number of integer instruction queue writes +system.cpu0.iq.int_inst_queue_writes 61357419 # Number of integer instruction queue writes system.cpu0.iq.int_inst_queue_wakeup_accesses 50866456 # Number of integer instruction queue wakeup accesses system.cpu0.iq.fp_inst_queue_reads 594706 # Number of floating instruction queue reads -system.cpu0.iq.fp_inst_queue_writes 278076 # Number of floating instruction queue writes +system.cpu0.iq.fp_inst_queue_writes 279378 # Number of floating instruction queue writes system.cpu0.iq.fp_inst_queue_wakeup_accesses 273817 # Number of floating instruction queue wakeup accesses system.cpu0.iq.int_alu_accesses 52889876 # Number of integer alu accesses system.cpu0.iq.fp_alu_accesses 320091 # Number of floating point alu accesses @@ -1032,7 +1032,7 @@ system.cpu1.iq.iqInstsAdded 9284732 # Nu system.cpu1.iq.iqNonSpecInstsAdded 487174 # Number of non-speculative instructions added to the IQ system.cpu1.iq.iqInstsIssued 9053277 # Number of instructions issued system.cpu1.iq.iqSquashedInstsIssued 20996 # Number of squashed instructions issued -system.cpu1.iq.iqSquashedInstsExamined 1498950 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu1.iq.iqSquashedInstsExamined 1564088 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu1.iq.iqSquashedOperandsExamined 731721 # Number of squashed operands that are examined and possibly removed from graph system.cpu1.iq.iqSquashedNonSpecRemoved 360528 # Number of squashed non-spec instructions that were removed system.cpu1.iq.issued_per_cycle::samples 13661307 # Number of insts issued each cycle @@ -1125,10 +1125,10 @@ system.cpu1.iq.rate 0.633233 # In system.cpu1.iq.fu_busy_cnt 251682 # FU busy when requested system.cpu1.iq.fu_busy_rate 0.027800 # FU busy rate (busy events/executed inst) system.cpu1.iq.int_inst_queue_reads 31870123 # Number of integer instruction queue reads -system.cpu1.iq.int_inst_queue_writes 11194643 # Number of integer instruction queue writes +system.cpu1.iq.int_inst_queue_writes 11259293 # Number of integer instruction queue writes system.cpu1.iq.int_inst_queue_wakeup_accesses 8718718 # Number of integer instruction queue wakeup accesses system.cpu1.iq.fp_inst_queue_reads 170415 # Number of floating instruction queue reads -system.cpu1.iq.fp_inst_queue_writes 80450 # Number of floating instruction queue writes +system.cpu1.iq.fp_inst_queue_writes 80938 # Number of floating instruction queue writes system.cpu1.iq.fp_inst_queue_wakeup_accesses 78899 # Number of floating instruction queue wakeup accesses system.cpu1.iq.int_alu_accesses 9210850 # Number of integer alu accesses system.cpu1.iq.fp_alu_accesses 91292 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal index 15c215278..7e0283697 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal @@ -27,7 +27,7 @@ M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
memcluster 1, usage 0, start 392, end 16384
freeing pages 1069:16384
reserving pages 1069:1070 -
4096K Bcache detected; load hit latency 30 cycles, load miss latency 140 cycles +
4096K Bcache detected; load hit latency 30 cycles, load miss latency 154 cycles
SMP: 2 CPUs probed -- cpu_present_mask = 3
Built 1 zonelists
Kernel command line: root=/dev/hda1 console=ttyS0 diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini index bce635119..4de22817f 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini @@ -15,19 +15,20 @@ boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/dist/binaries/console +console=/home/stever/m5/m5_system_2.0b3/binaries/console eventq_index=0 init_param=0 -kernel=/dist/binaries/vmlinux +kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing mem_ranges=0:134217727 memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 -pal=/dist/binaries/ts_osfpal -readfile=/work/gem5.latest/tests/halt.sh +pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh symbolfile= system_rev=1024 system_type=34 @@ -149,7 +150,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -163,7 +164,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -171,6 +171,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -518,6 +519,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -567,6 +569,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -600,8 +603,11 @@ size=4194304 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -640,7 +646,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.disk2] @@ -663,7 +669,7 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-bigswap2.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img read_only=true [system.dvfs_handler] @@ -683,9 +689,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.tsunami.pciconfig.pio master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma @@ -696,6 +704,7 @@ children=tags addr_ranges=0:134217727 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -730,11 +739,14 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio master=system.bridge.slave system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side @@ -784,7 +796,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -844,7 +856,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.terminal] diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout index 2666e2b50..25160cf8e 100755 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout @@ -1,12 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:12:51 -gem5 started Oct 29 2014 09:20:51 -gem5 executing on u200540-lin -command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 08:27:15 +gem5 executing on phenom +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 + Global frequency set at 1000000000000 ticks per second -info: kernel located at: /dist/binaries/vmlinux +info: kernel located at: /home/stever/m5/m5_system_2.0b3/binaries/vmlinux 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009 info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 1859038679000 because m5_exit instruction encountered +Exiting @ tick 1861005569500 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt index 7568645aa..80e8bf1d4 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.861006 # Nu sim_ticks 1861005569500 # Number of ticks simulated final_tick 1861005569500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 153218 # Simulator instruction rate (inst/s) -host_op_rate 153218 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 5386630373 # Simulator tick rate (ticks/s) -host_mem_usage 376136 # Number of bytes of host memory used -host_seconds 345.49 # Real time elapsed on the host +host_inst_rate 145313 # Simulator instruction rate (inst/s) +host_op_rate 145313 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 5108711594 # Simulator tick rate (ticks/s) +host_mem_usage 309496 # Number of bytes of host memory used +host_seconds 364.28 # Real time elapsed on the host sim_insts 52934565 # Number of instructions simulated sim_ops 52934565 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -425,7 +425,7 @@ system.cpu.iq.iqInstsAdded 58622970 # Nu system.cpu.iq.iqNonSpecInstsAdded 2136022 # Number of non-speculative instructions added to the IQ system.cpu.iq.iqInstsIssued 57539781 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 62715 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 7497440 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedInstsExamined 7824422 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu.iq.iqSquashedOperandsExamined 3554737 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 1474907 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 117014009 # Number of insts issued each cycle @@ -518,10 +518,10 @@ system.cpu.iq.rate 0.469435 # In system.cpu.iq.fu_busy_cnt 1115222 # FU busy when requested system.cpu.iq.fu_busy_rate 0.019382 # FU busy rate (busy events/executed inst) system.cpu.iq.int_inst_queue_reads 232558247 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 67941522 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_writes 68266797 # Number of integer instruction queue writes system.cpu.iq.int_inst_queue_wakeup_accesses 55883323 # Number of integer instruction queue wakeup accesses system.cpu.iq.fp_inst_queue_reads 713260 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 334790 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_writes 336497 # Number of floating instruction queue writes system.cpu.iq.fp_inst_queue_wakeup_accesses 329169 # Number of floating instruction queue wakeup accesses system.cpu.iq.int_alu_accesses 58264568 # Number of integer alu accesses system.cpu.iq.fp_alu_accesses 383149 # Number of floating point alu accesses diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal index 075c19401..008c44f37 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal @@ -24,7 +24,7 @@ M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
memcluster 1, usage 0, start 392, end 16384
freeing pages 1069:16384
reserving pages 1069:1070 -
4096K Bcache detected; load hit latency 30 cycles, load miss latency 140 cycles +
4096K Bcache detected; load hit latency 30 cycles, load miss latency 154 cycles
SMP: 1 CPUs probed -- cpu_present_mask = 1
Built 1 zonelists
Kernel command line: root=/dev/hda1 console=ttyS0 diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini index 3940f534b..2d4d2bc38 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini @@ -15,19 +15,20 @@ boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/dist/binaries/console +console=/home/stever/m5/m5_system_2.0b3/binaries/console eventq_index=0 init_param=0 -kernel=/dist/binaries/vmlinux +kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic mem_ranges=0:134217727 memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 -pal=/dist/binaries/ts_osfpal -readfile=/work/gem5.latest/tests/halt.sh +pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal +readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh symbolfile= system_rev=1024 system_type=34 @@ -102,6 +103,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -142,6 +144,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -327,7 +330,7 @@ wbWidth=8 workload= [system.cpu2.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -341,7 +344,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu2.dtb] type=AlphaTLB @@ -697,7 +699,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.disk2] @@ -720,7 +722,7 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-bigswap2.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img read_only=true [system.dvfs_handler] @@ -740,9 +742,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=true -width=8 +width=16 default=system.tsunami.pciconfig.pio master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma @@ -753,6 +757,7 @@ children=tags addr_ranges=0:134217727 assoc=8 clk_domain=system.clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 @@ -788,6 +793,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -822,11 +828,14 @@ type=CoherentXBar children=badaddr_responder clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 default=system.membus.badaddr_responder.pio master=system.bridge.slave system.physmem.port slave=system.system_port system.l2c.mem_side system.iocache.mem_side @@ -876,7 +885,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -936,7 +945,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-latest.img +image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img read_only=true [system.terminal] @@ -951,11 +960,14 @@ port=3456 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false -width=8 +width=32 master=system.l2c.cpu_side slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simerr b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simerr index 518507880..ffff6ec3c 100755 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simerr +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simerr @@ -1,5 +1,53 @@ warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting terminal connections warn: Sockets disabled, not accepting gdb connections +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 10136, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 11138, Bank: 3 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simout b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simout index 9fb7b2d24..29e1e9099 100755 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simout +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/simout @@ -1,9 +1,10 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:12:51 -gem5 started Oct 29 2014 09:24:03 -gem5 executing on u200540-lin -command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full -re /work/gem5.latest/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full +gem5 compiled Apr 22 2015 07:55:25 +gem5 started Apr 22 2015 08:35:45 +gem5 executing on phenom +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-switcheroo-full + Global frequency set at 1000000000000 ticks per second 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009 diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt index ff31246c1..438fcc2e5 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.841539 # Nu sim_ticks 1841538755500 # Number of ticks simulated final_tick 1841538755500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 221552 # Simulator instruction rate (inst/s) -host_op_rate 221552 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 5785089232 # Simulator tick rate (ticks/s) -host_mem_usage 374344 # Number of bytes of host memory used -host_seconds 318.33 # Real time elapsed on the host +host_inst_rate 221247 # Simulator instruction rate (inst/s) +host_op_rate 221247 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 5777125497 # Simulator tick rate (ticks/s) +host_mem_usage 308008 # Number of bytes of host memory used +host_seconds 318.76 # Real time elapsed on the host sim_insts 70525499 # Number of instructions simulated sim_ops 70525499 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -1109,7 +1109,7 @@ system.cpu2.iq.iqInstsAdded 32987424 # Nu system.cpu2.iq.iqNonSpecInstsAdded 681806 # Number of non-speculative instructions added to the IQ system.cpu2.iq.iqInstsIssued 32666998 # Number of instructions issued system.cpu2.iq.iqSquashedInstsIssued 16031 # Number of squashed instructions issued -system.cpu2.iq.iqSquashedInstsExamined 2457717 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu2.iq.iqSquashedInstsExamined 2569271 # Number of squashed instructions iterated over during squash; mainly for profiling system.cpu2.iq.iqSquashedOperandsExamined 1151235 # Number of squashed operands that are examined and possibly removed from graph system.cpu2.iq.iqSquashedNonSpecRemoved 487594 # Number of squashed non-spec instructions that were removed system.cpu2.iq.issued_per_cycle::samples 29124256 # Number of insts issued each cycle @@ -1202,10 +1202,10 @@ system.cpu2.iq.rate 1.063974 # In system.cpu2.iq.fu_busy_cnt 386915 # FU busy when requested system.cpu2.iq.fu_busy_rate 0.011844 # FU busy rate (busy events/executed inst) system.cpu2.iq.int_inst_queue_reads 94607462 # Number of integer instruction queue reads -system.cpu2.iq.int_inst_queue_writes 36013478 # Number of integer instruction queue writes +system.cpu2.iq.int_inst_queue_writes 36124516 # Number of integer instruction queue writes system.cpu2.iq.int_inst_queue_wakeup_accesses 32054290 # Number of integer instruction queue wakeup accesses system.cpu2.iq.fp_inst_queue_reads 253736 # Number of floating instruction queue reads -system.cpu2.iq.fp_inst_queue_writes 119374 # Number of floating instruction queue writes +system.cpu2.iq.fp_inst_queue_writes 119890 # Number of floating instruction queue writes system.cpu2.iq.fp_inst_queue_wakeup_accesses 117198 # Number of floating instruction queue wakeup accesses system.cpu2.iq.int_alu_accesses 32915380 # Number of integer alu accesses system.cpu2.iq.fp_alu_accesses 136083 # Number of floating point alu accesses |