diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/stats.txt')
| -rw-r--r-- | tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/stats.txt | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/stats.txt index f3f991d90..9c3703a65 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.854926 # Nu sim_ticks 2854925996500 # Number of ticks simulated final_tick 2854925996500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 115917 # Simulator instruction rate (inst/s) -host_op_rate 140154 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2954234125 # Simulator tick rate (ticks/s) -host_mem_usage 584856 # Number of bytes of host memory used -host_seconds 966.38 # Real time elapsed on the host +host_inst_rate 259837 # Simulator instruction rate (inst/s) +host_op_rate 314167 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 6622138542 # Simulator tick rate (ticks/s) +host_mem_usage 588096 # Number of bytes of host memory used +host_seconds 431.12 # Real time elapsed on the host sim_insts 112020669 # Number of instructions simulated sim_ops 135443008 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -563,7 +563,9 @@ system.cpu.op_class_0::FloatAdd 0 0.00% 67.13% # Cl system.cpu.op_class_0::FloatCmp 0 0.00% 67.13% # Class of committed instruction system.cpu.op_class_0::FloatCvt 0 0.00% 67.13% # Class of committed instruction system.cpu.op_class_0::FloatMult 0 0.00% 67.13% # Class of committed instruction +system.cpu.op_class_0::FloatMultAcc 0 0.00% 67.13% # Class of committed instruction system.cpu.op_class_0::FloatDiv 0 0.00% 67.13% # Class of committed instruction +system.cpu.op_class_0::FloatMisc 0 0.00% 67.13% # Class of committed instruction system.cpu.op_class_0::FloatSqrt 0 0.00% 67.13% # Class of committed instruction system.cpu.op_class_0::SimdAdd 0 0.00% 67.13% # Class of committed instruction system.cpu.op_class_0::SimdAddAcc 0 0.00% 67.13% # Class of committed instruction @@ -585,8 +587,10 @@ system.cpu.op_class_0::SimdFloatMisc 8481 0.01% 67.13% # Cl system.cpu.op_class_0::SimdFloatMult 0 0.00% 67.13% # Class of committed instruction system.cpu.op_class_0::SimdFloatMultAcc 0 0.00% 67.13% # Class of committed instruction system.cpu.op_class_0::SimdFloatSqrt 0 0.00% 67.13% # Class of committed instruction -system.cpu.op_class_0::MemRead 24250620 17.90% 85.04% # Class of committed instruction -system.cpu.op_class_0::MemWrite 20263468 14.96% 100.00% # Class of committed instruction +system.cpu.op_class_0::MemRead 24247912 17.90% 85.04% # Class of committed instruction +system.cpu.op_class_0::MemWrite 20254880 14.95% 99.99% # Class of committed instruction +system.cpu.op_class_0::FloatMemRead 2708 0.00% 99.99% # Class of committed instruction +system.cpu.op_class_0::FloatMemWrite 8588 0.01% 100.00% # Class of committed instruction system.cpu.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::total 135443008 # Class of committed instruction |