diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt')
| -rw-r--r-- | tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt | 103 |
1 files changed, 98 insertions, 5 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt index 315f9ca65..6bbe66965 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt @@ -4,15 +4,16 @@ sim_seconds 2.825960 # Nu sim_ticks 2825959731500 # Number of ticks simulated final_tick 2825959731500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 152939 # Simulator instruction rate (inst/s) -host_op_rate 185526 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 3598106166 # Simulator tick rate (ticks/s) -host_mem_usage 665816 # Number of bytes of host memory used -host_seconds 785.40 # Real time elapsed on the host +host_inst_rate 153141 # Simulator instruction rate (inst/s) +host_op_rate 185771 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 3602870624 # Simulator tick rate (ticks/s) +host_mem_usage 666712 # Number of bytes of host memory used +host_seconds 784.36 # Real time elapsed on the host sim_insts 120118276 # Number of instructions simulated sim_ops 145712235 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks +system.physmem.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.physmem.bytes_read::cpu0.dtb.walker 1728 # Number of bytes read from this memory system.physmem.bytes_read::cpu0.itb.walker 192 # Number of bytes read from this memory system.physmem.bytes_read::cpu0.inst 1306176 # Number of bytes read from this memory @@ -344,6 +345,7 @@ system.physmem_1.memoryStateTime::REF 94364920000 # Ti system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states system.physmem_1.memoryStateTime::ACT 26750317702 # Time in different power states system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states +system.realview.nvmem.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.realview.nvmem.bytes_read::cpu0.inst 112 # Number of bytes read from this memory system.realview.nvmem.bytes_read::cpu1.inst 176 # Number of bytes read from this memory system.realview.nvmem.bytes_read::total 288 # Number of bytes read from this memory @@ -362,6 +364,9 @@ system.realview.nvmem.bw_inst_read::total 102 # I system.realview.nvmem.bw_total::cpu0.inst 40 # Total bandwidth to/from this memory (bytes/s) system.realview.nvmem.bw_total::cpu1.inst 62 # Total bandwidth to/from this memory (bytes/s) system.realview.nvmem.bw_total::total 102 # Total bandwidth to/from this memory (bytes/s) +system.realview.vram.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.bridge.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). system.cf0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD). system.cf0.dma_read_txs 1 # Number of DMA read transactions (not PRD). @@ -382,6 +387,7 @@ system.cpu0.branchPred.indirectHits 9964028 # Nu system.cpu0.branchPred.indirectMisses 155489 # Number of indirect misses. system.cpu0.branchPredindirectMispredicted 48572 # Number of mispredicted indirect branches. system.cpu_clk_domain.clock 500 # Clock period in ticks +system.cpu0.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested system.cpu0.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst system.cpu0.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst @@ -411,6 +417,7 @@ system.cpu0.dstage2_mmu.stage2_tlb.inst_accesses 0 system.cpu0.dstage2_mmu.stage2_tlb.hits 0 # DTB hits system.cpu0.dstage2_mmu.stage2_tlb.misses 0 # DTB misses system.cpu0.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses +system.cpu0.dtb.walker.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.dtb.walker.walks 67255 # Table walker walks requested system.cpu0.dtb.walker.walksShort 67255 # Table walker walks initiated with short descriptors system.cpu0.dtb.walker.walksShortTerminationLevel::Level1 25406 # Level at which table walker walks with short descriptors terminate @@ -489,6 +496,7 @@ system.cpu0.dtb.inst_accesses 0 # IT system.cpu0.dtb.hits 41220590 # DTB hits system.cpu0.dtb.misses 67255 # DTB misses system.cpu0.dtb.accesses 41287845 # DTB accesses +system.cpu0.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested system.cpu0.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst system.cpu0.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst @@ -518,6 +526,7 @@ system.cpu0.istage2_mmu.stage2_tlb.inst_accesses 0 system.cpu0.istage2_mmu.stage2_tlb.hits 0 # DTB hits system.cpu0.istage2_mmu.stage2_tlb.misses 0 # DTB misses system.cpu0.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses +system.cpu0.itb.walker.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.itb.walker.walks 10944 # Table walker walks requested system.cpu0.itb.walker.walksShort 10944 # Table walker walks initiated with short descriptors system.cpu0.itb.walker.walksShortTerminationLevel::Level1 3906 # Level at which table walker walks with short descriptors terminate @@ -586,6 +595,19 @@ system.cpu0.itb.inst_accesses 72719816 # IT system.cpu0.itb.hits 72708872 # DTB hits system.cpu0.itb.misses 10944 # DTB misses system.cpu0.itb.accesses 72719816 # DTB accesses +system.cpu0.numPwrStateTransitions 3656 # Number of power state transitions +system.cpu0.pwrStateClkGateDist::samples 1828 # Distribution of time spent in the clock gated state +system.cpu0.pwrStateClkGateDist::mean 1490596475.785011 # Distribution of time spent in the clock gated state +system.cpu0.pwrStateClkGateDist::stdev 23949118810.105305 # Distribution of time spent in the clock gated state +system.cpu0.pwrStateClkGateDist::underflows 1055 57.71% 57.71% # Distribution of time spent in the clock gated state +system.cpu0.pwrStateClkGateDist::1000-5e+10 768 42.01% 99.73% # Distribution of time spent in the clock gated state +system.cpu0.pwrStateClkGateDist::1.5e+11-2e+11 1 0.05% 99.78% # Distribution of time spent in the clock gated state +system.cpu0.pwrStateClkGateDist::4.5e+11-5e+11 4 0.22% 100.00% # Distribution of time spent in the clock gated state +system.cpu0.pwrStateClkGateDist::min_value 1 # Distribution of time spent in the clock gated state +system.cpu0.pwrStateClkGateDist::max_value 499973380096 # Distribution of time spent in the clock gated state +system.cpu0.pwrStateClkGateDist::total 1828 # Distribution of time spent in the clock gated state +system.cpu0.pwrStateResidencyTicks::ON 101149373765 # Cumulative time (in ticks) in various power states +system.cpu0.pwrStateResidencyTicks::CLK_GATED 2724810357735 # Cumulative time (in ticks) in various power states system.cpu0.numCycles 202299816 # number of cpu cycles simulated system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -880,6 +902,7 @@ system.cpu0.cc_regfile_reads 464897652 # nu system.cpu0.cc_regfile_writes 49725456 # number of cc regfile writes system.cpu0.misc_regfile_reads 388373326 # number of misc regfile reads system.cpu0.misc_regfile_writes 1224889 # number of misc regfile writes +system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.dcache.tags.replacements 709828 # number of replacements system.cpu0.dcache.tags.tagsinuse 497.174198 # Cycle average of tags in use system.cpu0.dcache.tags.total_refs 37665141 # Total number of references to valid blocks. @@ -896,6 +919,7 @@ system.cpu0.dcache.tags.age_task_id_blocks_1024::2 17 system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id system.cpu0.dcache.tags.tag_accesses 81170296 # Number of tag accesses system.cpu0.dcache.tags.data_accesses 81170296 # Number of data accesses +system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.dcache.ReadReq_hits::cpu0.data 21454849 # number of ReadReq hits system.cpu0.dcache.ReadReq_hits::total 21454849 # number of ReadReq hits system.cpu0.dcache.WriteReq_hits::cpu0.data 14988122 # number of WriteReq hits @@ -1072,6 +1096,7 @@ system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu0.data 208398.429385 system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total 208398.429385 # average ReadReq mshr uncacheable latency system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu0.data 109945.475831 # average overall mshr uncacheable latency system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 109945.475831 # average overall mshr uncacheable latency +system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.icache.tags.replacements 1253795 # number of replacements system.cpu0.icache.tags.tagsinuse 511.762128 # Cycle average of tags in use system.cpu0.icache.tags.total_refs 71396857 # Total number of references to valid blocks. @@ -1088,6 +1113,7 @@ system.cpu0.icache.tags.age_task_id_blocks_1024::2 122 system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id system.cpu0.icache.tags.tag_accesses 146664376 # Number of tag accesses system.cpu0.icache.tags.data_accesses 146664376 # Number of data accesses +system.cpu0.icache.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.icache.ReadReq_hits::cpu0.inst 71396857 # number of ReadReq hits system.cpu0.icache.ReadReq_hits::total 71396857 # number of ReadReq hits system.cpu0.icache.demand_hits::cpu0.inst 71396857 # number of demand (read+write) hits @@ -1174,12 +1200,14 @@ system.cpu0.icache.ReadReq_avg_mshr_uncacheable_latency::cpu0.inst 89625.540460 system.cpu0.icache.ReadReq_avg_mshr_uncacheable_latency::total 89625.540460 # average ReadReq mshr uncacheable latency system.cpu0.icache.overall_avg_mshr_uncacheable_latency::cpu0.inst 89625.540460 # average overall mshr uncacheable latency system.cpu0.icache.overall_avg_mshr_uncacheable_latency::total 89625.540460 # average overall mshr uncacheable latency +system.cpu0.l2cache.prefetcher.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.l2cache.prefetcher.num_hwpf_issued 1837870 # number of hwpf issued system.cpu0.l2cache.prefetcher.pfIdentified 1840472 # number of prefetch candidates identified system.cpu0.l2cache.prefetcher.pfBufferHit 2353 # number of redundant prefetches already in prefetch queue system.cpu0.l2cache.prefetcher.pfInCache 0 # number of redundant prefetches already in cache/mshr dropped system.cpu0.l2cache.prefetcher.pfRemovedFull 0 # number of prefetches dropped due to prefetch queue size system.cpu0.l2cache.prefetcher.pfSpanPage 236752 # number of prefetches not generated due to page crossing +system.cpu0.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.l2cache.tags.replacements 276743 # number of replacements system.cpu0.l2cache.tags.tagsinuse 16098.325627 # Cycle average of tags in use system.cpu0.l2cache.tags.total_refs 3280707 # Total number of references to valid blocks. @@ -1216,6 +1244,7 @@ system.cpu0.l2cache.tags.occ_task_id_percent::1023 0.000732 system.cpu0.l2cache.tags.occ_task_id_percent::1024 0.921692 # Percentage of cache occupancy per task id system.cpu0.l2cache.tags.tag_accesses 66287217 # Number of tag accesses system.cpu0.l2cache.tags.data_accesses 66287217 # Number of data accesses +system.cpu0.l2cache.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.l2cache.ReadReq_hits::cpu0.dtb.walker 55484 # number of ReadReq hits system.cpu0.l2cache.ReadReq_hits::cpu0.itb.walker 13243 # number of ReadReq hits system.cpu0.l2cache.ReadReq_hits::total 68727 # number of ReadReq hits @@ -1533,6 +1562,7 @@ system.cpu0.toL2Bus.snoop_filter.hit_multi_requests 31273 system.cpu0.toL2Bus.snoop_filter.tot_snoops 323545 # Total number of snoops made to the snoop filter. system.cpu0.toL2Bus.snoop_filter.hit_single_snoops 318913 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.cpu0.toL2Bus.snoop_filter.hit_multi_snoops 4632 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. +system.cpu0.toL2Bus.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu0.toL2Bus.trans_dist::ReadReq 114042 # Transaction distribution system.cpu0.toL2Bus.trans_dist::ReadResp 1911688 # Transaction distribution system.cpu0.toL2Bus.trans_dist::WriteReq 28450 # Transaction distribution @@ -1598,6 +1628,7 @@ system.cpu1.branchPred.indirectLookups 249142 # Nu system.cpu1.branchPred.indirectHits 213575 # Number of indirect target hits. system.cpu1.branchPred.indirectMisses 35567 # Number of indirect misses. system.cpu1.branchPredindirectMispredicted 10613 # Number of mispredicted indirect branches. +system.cpu1.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst @@ -1627,6 +1658,7 @@ system.cpu1.dstage2_mmu.stage2_tlb.inst_accesses 0 system.cpu1.dstage2_mmu.stage2_tlb.hits 0 # DTB hits system.cpu1.dstage2_mmu.stage2_tlb.misses 0 # DTB misses system.cpu1.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses +system.cpu1.dtb.walker.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.dtb.walker.walks 21410 # Table walker walks requested system.cpu1.dtb.walker.walksShort 21410 # Table walker walks initiated with short descriptors system.cpu1.dtb.walker.walksShortTerminationLevel::Level1 8641 # Level at which table walker walks with short descriptors terminate @@ -1708,6 +1740,7 @@ system.cpu1.dtb.inst_accesses 0 # IT system.cpu1.dtb.hits 7689335 # DTB hits system.cpu1.dtb.misses 21410 # DTB misses system.cpu1.dtb.accesses 7710745 # DTB accesses +system.cpu1.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested system.cpu1.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst system.cpu1.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst @@ -1737,6 +1770,7 @@ system.cpu1.istage2_mmu.stage2_tlb.inst_accesses 0 system.cpu1.istage2_mmu.stage2_tlb.hits 0 # DTB hits system.cpu1.istage2_mmu.stage2_tlb.misses 0 # DTB misses system.cpu1.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses +system.cpu1.itb.walker.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.itb.walker.walks 5994 # Table walker walks requested system.cpu1.itb.walker.walksShort 5994 # Table walker walks initiated with short descriptors system.cpu1.itb.walker.walksShortTerminationLevel::Level1 2734 # Level at which table walker walks with short descriptors terminate @@ -1807,6 +1841,22 @@ system.cpu1.itb.inst_accesses 8259433 # IT system.cpu1.itb.hits 8253439 # DTB hits system.cpu1.itb.misses 5994 # DTB misses system.cpu1.itb.accesses 8259433 # DTB accesses +system.cpu1.numPwrStateTransitions 5525 # Number of power state transitions +system.cpu1.pwrStateClkGateDist::samples 2763 # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::mean 1016473602.620702 # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::stdev 25821981878.711128 # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::underflows 1969 71.26% 71.26% # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::1000-5e+10 788 28.52% 99.78% # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::5e+10-1e+11 2 0.07% 99.86% # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::1e+11-1.5e+11 1 0.04% 99.89% # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::5e+11-5.5e+11 1 0.04% 99.93% # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::7.5e+11-8e+11 1 0.04% 99.96% # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::9.5e+11-1e+12 1 0.04% 100.00% # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::min_value 1 # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::max_value 959984667908 # Distribution of time spent in the clock gated state +system.cpu1.pwrStateClkGateDist::total 2763 # Distribution of time spent in the clock gated state +system.cpu1.pwrStateResidencyTicks::ON 17443167459 # Cumulative time (in ticks) in various power states +system.cpu1.pwrStateResidencyTicks::CLK_GATED 2808516564041 # Cumulative time (in ticks) in various power states system.cpu1.numCycles 34887121 # number of cpu cycles simulated system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -2101,6 +2151,7 @@ system.cpu1.cc_regfile_reads 75464831 # nu system.cpu1.cc_regfile_writes 6816973 # number of cc regfile writes system.cpu1.misc_regfile_reads 66091366 # number of misc regfile reads system.cpu1.misc_regfile_writes 387254 # number of misc regfile writes +system.cpu1.dcache.tags.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.dcache.tags.replacements 189214 # number of replacements system.cpu1.dcache.tags.tagsinuse 472.223119 # Cycle average of tags in use system.cpu1.dcache.tags.total_refs 6799121 # Total number of references to valid blocks. @@ -2116,6 +2167,7 @@ system.cpu1.dcache.tags.age_task_id_blocks_1024::3 16 system.cpu1.dcache.tags.occ_task_id_percent::1024 0.654297 # Percentage of cache occupancy per task id system.cpu1.dcache.tags.tag_accesses 15096738 # Number of tag accesses system.cpu1.dcache.tags.data_accesses 15096738 # Number of data accesses +system.cpu1.dcache.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.dcache.ReadReq_hits::cpu1.data 3630827 # number of ReadReq hits system.cpu1.dcache.ReadReq_hits::total 3630827 # number of ReadReq hits system.cpu1.dcache.WriteReq_hits::cpu1.data 2915447 # number of WriteReq hits @@ -2292,6 +2344,7 @@ system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 143594.866797 system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::total 143594.866797 # average ReadReq mshr uncacheable latency system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::cpu1.data 80171.413024 # average overall mshr uncacheable latency system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::total 80171.413024 # average overall mshr uncacheable latency +system.cpu1.icache.tags.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.icache.tags.replacements 585593 # number of replacements system.cpu1.icache.tags.tagsinuse 499.448296 # Cycle average of tags in use system.cpu1.icache.tags.total_refs 7643805 # Total number of references to valid blocks. @@ -2307,6 +2360,7 @@ system.cpu1.icache.tags.age_task_id_blocks_1024::3 17 system.cpu1.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id system.cpu1.icache.tags.tag_accesses 17090093 # Number of tag accesses system.cpu1.icache.tags.data_accesses 17090093 # Number of data accesses +system.cpu1.icache.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.icache.ReadReq_hits::cpu1.inst 7643805 # number of ReadReq hits system.cpu1.icache.ReadReq_hits::total 7643805 # number of ReadReq hits system.cpu1.icache.demand_hits::cpu1.inst 7643805 # number of demand (read+write) hits @@ -2393,12 +2447,14 @@ system.cpu1.icache.ReadReq_avg_mshr_uncacheable_latency::cpu1.inst 90480.392157 system.cpu1.icache.ReadReq_avg_mshr_uncacheable_latency::total 90480.392157 # average ReadReq mshr uncacheable latency system.cpu1.icache.overall_avg_mshr_uncacheable_latency::cpu1.inst 90480.392157 # average overall mshr uncacheable latency system.cpu1.icache.overall_avg_mshr_uncacheable_latency::total 90480.392157 # average overall mshr uncacheable latency +system.cpu1.l2cache.prefetcher.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.l2cache.prefetcher.num_hwpf_issued 204984 # number of hwpf issued system.cpu1.l2cache.prefetcher.pfIdentified 205710 # number of prefetch candidates identified system.cpu1.l2cache.prefetcher.pfBufferHit 651 # number of redundant prefetches already in prefetch queue system.cpu1.l2cache.prefetcher.pfInCache 0 # number of redundant prefetches already in cache/mshr dropped system.cpu1.l2cache.prefetcher.pfRemovedFull 0 # number of prefetches dropped due to prefetch queue size system.cpu1.l2cache.prefetcher.pfSpanPage 59802 # number of prefetches not generated due to page crossing +system.cpu1.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.l2cache.tags.replacements 51951 # number of replacements system.cpu1.l2cache.tags.tagsinuse 15270.218898 # Cycle average of tags in use system.cpu1.l2cache.tags.total_refs 1330892 # Total number of references to valid blocks. @@ -2431,6 +2487,7 @@ system.cpu1.l2cache.tags.occ_task_id_percent::1023 0.002075 system.cpu1.l2cache.tags.occ_task_id_percent::1024 0.826477 # Percentage of cache occupancy per task id system.cpu1.l2cache.tags.tag_accesses 26699823 # Number of tag accesses system.cpu1.l2cache.tags.data_accesses 26699823 # Number of data accesses +system.cpu1.l2cache.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.l2cache.ReadReq_hits::cpu1.dtb.walker 16755 # number of ReadReq hits system.cpu1.l2cache.ReadReq_hits::cpu1.itb.walker 6229 # number of ReadReq hits system.cpu1.l2cache.ReadReq_hits::total 22984 # number of ReadReq hits @@ -2742,6 +2799,7 @@ system.cpu1.toL2Bus.snoop_filter.hit_multi_requests 12415 system.cpu1.toL2Bus.snoop_filter.tot_snoops 183176 # Total number of snoops made to the snoop filter. system.cpu1.toL2Bus.snoop_filter.hit_single_snoops 180762 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.cpu1.toL2Bus.snoop_filter.hit_multi_snoops 2414 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. +system.cpu1.toL2Bus.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.cpu1.toL2Bus.trans_dist::ReadReq 31669 # Transaction distribution system.cpu1.toL2Bus.trans_dist::ReadResp 826741 # Transaction distribution system.cpu1.toL2Bus.trans_dist::WriteReq 2435 # Transaction distribution @@ -2794,6 +2852,7 @@ system.cpu1.toL2Bus.respLayer2.occupancy 8027984 # La system.cpu1.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%) system.cpu1.toL2Bus.respLayer3.occupancy 20485966 # Layer occupancy (ticks) system.cpu1.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%) +system.iobus.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.iobus.trans_dist::ReadReq 31012 # Transaction distribution system.iobus.trans_dist::ReadResp 31012 # Transaction distribution system.iobus.trans_dist::WriteReq 59421 # Transaction distribution @@ -2888,6 +2947,7 @@ system.iobus.respLayer0.occupancy 84717000 # La system.iobus.respLayer0.utilization 0.0 # Layer utilization (%) system.iobus.respLayer3.occupancy 36776000 # Layer occupancy (ticks) system.iobus.respLayer3.utilization 0.0 # Layer utilization (%) +system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.iocache.tags.replacements 36458 # number of replacements system.iocache.tags.tagsinuse 14.555465 # Cycle average of tags in use system.iocache.tags.total_refs 0 # Total number of references to valid blocks. @@ -2902,6 +2962,7 @@ system.iocache.tags.age_task_id_blocks_1023::3 16 system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id system.iocache.tags.tag_accesses 328284 # Number of tag accesses system.iocache.tags.data_accesses 328284 # Number of data accesses +system.iocache.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.iocache.ReadReq_misses::realview.ide 252 # number of ReadReq misses system.iocache.ReadReq_misses::total 252 # number of ReadReq misses system.iocache.WriteLineReq_misses::realview.ide 36224 # number of WriteLineReq misses @@ -2982,6 +3043,7 @@ system.iocache.demand_avg_mshr_miss_latency::realview.ide 68813.138529 system.iocache.demand_avg_mshr_miss_latency::total 68813.138529 # average overall mshr miss latency system.iocache.overall_avg_mshr_miss_latency::realview.ide 68813.138529 # average overall mshr miss latency system.iocache.overall_avg_mshr_miss_latency::total 68813.138529 # average overall mshr miss latency +system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.l2c.tags.replacements 132778 # number of replacements system.l2c.tags.tagsinuse 63203.828730 # Cycle average of tags in use system.l2c.tags.total_refs 444088 # Total number of references to valid blocks. @@ -3029,6 +3091,7 @@ system.l2c.tags.occ_task_id_percent::1023 0.000458 # P system.l2c.tags.occ_task_id_percent::1024 0.527679 # Percentage of cache occupancy per task id system.l2c.tags.tag_accesses 6131058 # Number of tag accesses system.l2c.tags.data_accesses 6131058 # Number of data accesses +system.l2c.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.l2c.WritebackDirty_hits::writebacks 266860 # number of WritebackDirty hits system.l2c.WritebackDirty_hits::total 266860 # number of WritebackDirty hits system.l2c.UpgradeReq_hits::cpu0.data 32430 # number of UpgradeReq hits @@ -3513,6 +3576,7 @@ system.membus.snoop_filter.hit_multi_requests 572 system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. +system.membus.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.membus.trans_dist::ReadReq 37951 # Transaction distribution system.membus.trans_dist::ReadResp 212466 # Transaction distribution system.membus.trans_dist::WriteReq 30885 # Transaction distribution @@ -3567,12 +3631,21 @@ system.membus.respLayer2.occupancy 1121401156 # La system.membus.respLayer2.utilization 0.0 # Layer utilization (%) system.membus.respLayer3.occupancy 1360881 # Layer occupancy (ticks) system.membus.respLayer3.utilization 0.0 # Layer utilization (%) +system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.aaci_fake.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.pci_host.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.cf_ctrl.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.gic.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.clcd.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.realview_io.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.realview.dcc.osc_cpu.clock 16667 # Clock period in ticks system.realview.dcc.osc_ddr.clock 25000 # Clock period in ticks system.realview.dcc.osc_hsbm.clock 25000 # Clock period in ticks system.realview.dcc.osc_pxl.clock 42105 # Clock period in ticks system.realview.dcc.osc_smb.clock 20000 # Clock period in ticks system.realview.dcc.osc_sys.clock 16667 # Clock period in ticks +system.realview.energy_ctrl.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.ethernet.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.realview.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA system.realview.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA system.realview.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA @@ -3604,16 +3677,36 @@ system.realview.ethernet.totalRxOrn 0 # to system.realview.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post system.realview.ethernet.postedInterrupts 0 # number of posts to CPU system.realview.ethernet.droppedPackets 0 # number of packets dropped +system.realview.hdlcd.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.ide.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.kmi0.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.kmi1.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.l2x0_fake.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.lan_fake.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.local_cpu_timer.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.realview.mcc.osc_clcd.clock 42105 # Clock period in ticks system.realview.mcc.osc_mcc.clock 20000 # Clock period in ticks system.realview.mcc.osc_peripheral.clock 41667 # Clock period in ticks system.realview.mcc.osc_system_bus.clock 41667 # Clock period in ticks +system.realview.mmc_fake.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.rtc.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.sp810_fake.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.timer0.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.timer1.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.uart.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.uart1_fake.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.uart2_fake.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.uart3_fake.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.usb_fake.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.vgic.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states +system.realview.watchdog_fake.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.toL2Bus.snoop_filter.tot_requests 1012829 # Total number of requests made to the snoop filter. system.toL2Bus.snoop_filter.hit_single_requests 548493 # Number of requests hitting in the snoop filter with a single holder of the requested data. system.toL2Bus.snoop_filter.hit_multi_requests 154614 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. system.toL2Bus.snoop_filter.tot_snoops 20965 # Total number of snoops made to the snoop filter. system.toL2Bus.snoop_filter.hit_single_snoops 19995 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.toL2Bus.snoop_filter.hit_multi_snoops 970 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. +system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 2825959731500 # Cumulative time (in ticks) in various power states system.toL2Bus.trans_dist::ReadReq 37954 # Transaction distribution system.toL2Bus.trans_dist::ReadResp 485832 # Transaction distribution system.toL2Bus.trans_dist::WriteReq 30885 # Transaction distribution |