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Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt')
-rw-r--r--tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt4812
1 files changed, 2439 insertions, 2373 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt
index 53535ebf9..16738d5e3 100644
--- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt
+++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt
@@ -1,164 +1,172 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 2.824845 # Number of seconds simulated
-sim_ticks 2824844935500 # Number of ticks simulated
-final_tick 2824844935500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 2.823729 # Number of seconds simulated
+sim_ticks 2823728611500 # Number of ticks simulated
+final_tick 2823728611500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 301818 # Simulator instruction rate (inst/s)
-host_op_rate 366127 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 6933711439 # Simulator tick rate (ticks/s)
-host_mem_usage 588164 # Number of bytes of host memory used
-host_seconds 407.41 # Real time elapsed on the host
-sim_insts 122962678 # Number of instructions simulated
-sim_ops 149162687 # Number of ops (including micro ops) simulated
+host_inst_rate 263665 # Simulator instruction rate (inst/s)
+host_op_rate 319829 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 6058824639 # Simulator tick rate (ticks/s)
+host_mem_usage 584988 # Number of bytes of host memory used
+host_seconds 466.05 # Real time elapsed on the host
+sim_insts 122881667 # Number of instructions simulated
+sim_ops 149056790 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
-system.physmem.bytes_read::cpu0.dtb.walker 192 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu0.itb.walker 64 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu0.inst 540004 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu0.data 4201700 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu0.dtb.walker 320 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu0.itb.walker 128 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu0.inst 538276 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu0.data 3140708 # Number of bytes read from this memory
system.physmem.bytes_read::cpu1.dtb.walker 64 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu1.inst 117312 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu1.data 902784 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu2.dtb.walker 1664 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu2.inst 307648 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu2.data 1658880 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu3.dtb.walker 4224 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu3.inst 418176 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu3.data 2992192 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu1.inst 122816 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu1.data 897088 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu2.dtb.walker 1792 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu2.itb.walker 64 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu2.inst 339840 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu2.data 2003776 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu3.dtb.walker 4480 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu3.itb.walker 64 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu3.inst 386816 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu3.data 3512832 # Number of bytes read from this memory
system.physmem.bytes_read::realview.ide 960 # Number of bytes read from this memory
-system.physmem.bytes_read::total 11145864 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu0.inst 540004 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::cpu1.inst 117312 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::cpu2.inst 307648 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::cpu3.inst 418176 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 1383140 # Number of instructions bytes read from this memory
-system.physmem.bytes_written::writebacks 8393280 # Number of bytes written to this memory
+system.physmem.bytes_read::total 10950024 # Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu0.inst 538276 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::cpu1.inst 122816 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::cpu2.inst 339840 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::cpu3.inst 386816 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 1387748 # Number of instructions bytes read from this memory
+system.physmem.bytes_written::writebacks 8235776 # Number of bytes written to this memory
system.physmem.bytes_written::cpu0.data 17524 # Number of bytes written to this memory
-system.physmem.bytes_written::total 8410804 # Number of bytes written to this memory
-system.physmem.num_reads::cpu0.dtb.walker 3 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu0.itb.walker 1 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu0.inst 16891 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu0.data 66171 # Number of read requests responded to by this memory
+system.physmem.bytes_written::total 8253300 # Number of bytes written to this memory
+system.physmem.num_reads::cpu0.dtb.walker 5 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu0.itb.walker 2 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu0.inst 16864 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu0.data 49593 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu1.dtb.walker 1 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu1.inst 1833 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu1.data 14106 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu2.dtb.walker 26 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu2.inst 4807 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu2.data 25920 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu3.dtb.walker 66 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu3.inst 6534 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu3.data 46753 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu1.inst 1919 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu1.data 14017 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu2.dtb.walker 28 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu2.itb.walker 1 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu2.inst 5310 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu2.data 31309 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu3.dtb.walker 70 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu3.itb.walker 1 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu3.inst 6044 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu3.data 54888 # Number of read requests responded to by this memory
system.physmem.num_reads::realview.ide 15 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 183127 # Number of read requests responded to by this memory
-system.physmem.num_writes::writebacks 131145 # Number of write requests responded to by this memory
+system.physmem.num_reads::total 180067 # Number of read requests responded to by this memory
+system.physmem.num_writes::writebacks 128684 # Number of write requests responded to by this memory
system.physmem.num_writes::cpu0.data 4381 # Number of write requests responded to by this memory
-system.physmem.num_writes::total 135526 # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu0.dtb.walker 68 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu0.itb.walker 23 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu0.inst 191162 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu0.data 1487409 # Total read bandwidth from this memory (bytes/s)
+system.physmem.num_writes::total 133065 # Number of write requests responded to by this memory
+system.physmem.bw_read::cpu0.dtb.walker 113 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu0.itb.walker 45 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu0.inst 190626 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu0.data 1112256 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu1.dtb.walker 23 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu1.inst 41529 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu1.data 319587 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu2.dtb.walker 589 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu2.inst 108908 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu2.data 587246 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu3.dtb.walker 1495 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu3.inst 148035 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu3.data 1059241 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu1.inst 43494 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu1.data 317696 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu2.dtb.walker 635 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu2.itb.walker 23 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu2.inst 120352 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu2.data 709621 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu3.dtb.walker 1587 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu3.itb.walker 23 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu3.inst 136988 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu3.data 1244040 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::realview.ide 340 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 3945655 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu0.inst 191162 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu1.inst 41529 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu2.inst 108908 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu3.inst 148035 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 489634 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::writebacks 2971236 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu0.data 6204 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 2977439 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::writebacks 2971236 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu0.dtb.walker 68 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu0.itb.walker 23 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu0.inst 191162 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu0.data 1493613 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::total 3877860 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu0.inst 190626 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu1.inst 43494 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu2.inst 120352 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu3.inst 136988 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 491459 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::writebacks 2916632 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu0.data 6206 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 2922838 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::writebacks 2916632 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu0.dtb.walker 113 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu0.itb.walker 45 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu0.inst 190626 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu0.data 1118462 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu1.dtb.walker 23 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu1.inst 41529 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu1.data 319587 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu2.dtb.walker 589 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu2.inst 108908 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu2.data 587246 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu3.dtb.walker 1495 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu3.inst 148035 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu3.data 1059241 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu1.inst 43494 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu1.data 317696 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu2.dtb.walker 635 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu2.itb.walker 23 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu2.inst 120352 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu2.data 709621 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu3.dtb.walker 1587 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu3.itb.walker 23 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu3.inst 136988 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu3.data 1244040 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::realview.ide 340 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 6923094 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 100046 # Number of read requests accepted
-system.physmem.writeReqs 68732 # Number of write requests accepted
-system.physmem.readBursts 100046 # Number of DRAM read bursts, including those serviced by the write queue
-system.physmem.writeBursts 68732 # Number of DRAM write bursts, including those merged in the write queue
-system.physmem.bytesReadDRAM 6396992 # Total number of bytes read from DRAM
-system.physmem.bytesReadWrQ 5952 # Total number of bytes read from write queue
-system.physmem.bytesWritten 4397632 # Total number of bytes written to DRAM
-system.physmem.bytesReadSys 6402944 # Total read bytes from the system interface side
-system.physmem.bytesWrittenSys 4398848 # Total written bytes from the system interface side
-system.physmem.servicedByWrQ 93 # Number of DRAM read bursts serviced by the write queue
+system.physmem.bw_total::total 6800697 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.readReqs 113588 # Number of read requests accepted
+system.physmem.writeReqs 68931 # Number of write requests accepted
+system.physmem.readBursts 113588 # Number of DRAM read bursts, including those serviced by the write queue
+system.physmem.writeBursts 68931 # Number of DRAM write bursts, including those merged in the write queue
+system.physmem.bytesReadDRAM 7262464 # Total number of bytes read from DRAM
+system.physmem.bytesReadWrQ 7168 # Total number of bytes read from write queue
+system.physmem.bytesWritten 4410816 # Total number of bytes written to DRAM
+system.physmem.bytesReadSys 7269632 # Total read bytes from the system interface side
+system.physmem.bytesWrittenSys 4411584 # Total written bytes from the system interface side
+system.physmem.servicedByWrQ 112 # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one
system.physmem.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
-system.physmem.perBankRdBursts::0 6841 # Per bank write bursts
-system.physmem.perBankRdBursts::1 6294 # Per bank write bursts
-system.physmem.perBankRdBursts::2 6670 # Per bank write bursts
-system.physmem.perBankRdBursts::3 6264 # Per bank write bursts
-system.physmem.perBankRdBursts::4 6125 # Per bank write bursts
-system.physmem.perBankRdBursts::5 5943 # Per bank write bursts
-system.physmem.perBankRdBursts::6 6707 # Per bank write bursts
-system.physmem.perBankRdBursts::7 6704 # Per bank write bursts
-system.physmem.perBankRdBursts::8 6491 # Per bank write bursts
-system.physmem.perBankRdBursts::9 6555 # Per bank write bursts
-system.physmem.perBankRdBursts::10 6154 # Per bank write bursts
-system.physmem.perBankRdBursts::11 5521 # Per bank write bursts
-system.physmem.perBankRdBursts::12 5628 # Per bank write bursts
-system.physmem.perBankRdBursts::13 6555 # Per bank write bursts
-system.physmem.perBankRdBursts::14 6152 # Per bank write bursts
-system.physmem.perBankRdBursts::15 5349 # Per bank write bursts
-system.physmem.perBankWrBursts::0 4568 # Per bank write bursts
-system.physmem.perBankWrBursts::1 4266 # Per bank write bursts
-system.physmem.perBankWrBursts::2 4764 # Per bank write bursts
-system.physmem.perBankWrBursts::3 4205 # Per bank write bursts
-system.physmem.perBankWrBursts::4 4158 # Per bank write bursts
-system.physmem.perBankWrBursts::5 4117 # Per bank write bursts
-system.physmem.perBankWrBursts::6 4748 # Per bank write bursts
-system.physmem.perBankWrBursts::7 4286 # Per bank write bursts
-system.physmem.perBankWrBursts::8 4452 # Per bank write bursts
-system.physmem.perBankWrBursts::9 4767 # Per bank write bursts
-system.physmem.perBankWrBursts::10 4196 # Per bank write bursts
-system.physmem.perBankWrBursts::11 3943 # Per bank write bursts
-system.physmem.perBankWrBursts::12 3845 # Per bank write bursts
-system.physmem.perBankWrBursts::13 4709 # Per bank write bursts
-system.physmem.perBankWrBursts::14 4129 # Per bank write bursts
-system.physmem.perBankWrBursts::15 3560 # Per bank write bursts
+system.physmem.perBankRdBursts::0 7537 # Per bank write bursts
+system.physmem.perBankRdBursts::1 6789 # Per bank write bursts
+system.physmem.perBankRdBursts::2 7399 # Per bank write bursts
+system.physmem.perBankRdBursts::3 7485 # Per bank write bursts
+system.physmem.perBankRdBursts::4 7337 # Per bank write bursts
+system.physmem.perBankRdBursts::5 7010 # Per bank write bursts
+system.physmem.perBankRdBursts::6 7617 # Per bank write bursts
+system.physmem.perBankRdBursts::7 7715 # Per bank write bursts
+system.physmem.perBankRdBursts::8 6869 # Per bank write bursts
+system.physmem.perBankRdBursts::9 7528 # Per bank write bursts
+system.physmem.perBankRdBursts::10 7086 # Per bank write bursts
+system.physmem.perBankRdBursts::11 6373 # Per bank write bursts
+system.physmem.perBankRdBursts::12 6401 # Per bank write bursts
+system.physmem.perBankRdBursts::13 7208 # Per bank write bursts
+system.physmem.perBankRdBursts::14 6839 # Per bank write bursts
+system.physmem.perBankRdBursts::15 6283 # Per bank write bursts
+system.physmem.perBankWrBursts::0 4402 # Per bank write bursts
+system.physmem.perBankWrBursts::1 3960 # Per bank write bursts
+system.physmem.perBankWrBursts::2 4483 # Per bank write bursts
+system.physmem.perBankWrBursts::3 4623 # Per bank write bursts
+system.physmem.perBankWrBursts::4 4313 # Per bank write bursts
+system.physmem.perBankWrBursts::5 4310 # Per bank write bursts
+system.physmem.perBankWrBursts::6 4616 # Per bank write bursts
+system.physmem.perBankWrBursts::7 4482 # Per bank write bursts
+system.physmem.perBankWrBursts::8 4162 # Per bank write bursts
+system.physmem.perBankWrBursts::9 4849 # Per bank write bursts
+system.physmem.perBankWrBursts::10 4455 # Per bank write bursts
+system.physmem.perBankWrBursts::11 3923 # Per bank write bursts
+system.physmem.perBankWrBursts::12 3821 # Per bank write bursts
+system.physmem.perBankWrBursts::13 4641 # Per bank write bursts
+system.physmem.perBankWrBursts::14 4142 # Per bank write bursts
+system.physmem.perBankWrBursts::15 3737 # Per bank write bursts
system.physmem.numRdRetry 0 # Number of times read queue was full causing retry
-system.physmem.numWrRetry 2 # Number of times write queue was full causing retry
-system.physmem.totGap 2823278667500 # Total gap between requests
+system.physmem.numWrRetry 0 # Number of times write queue was full causing retry
+system.physmem.totGap 2822156484500 # Total gap between requests
system.physmem.readPktSize::0 0 # Read request sizes (log2)
system.physmem.readPktSize::1 0 # Read request sizes (log2)
system.physmem.readPktSize::2 0 # Read request sizes (log2)
system.physmem.readPktSize::3 0 # Read request sizes (log2)
system.physmem.readPktSize::4 0 # Read request sizes (log2)
system.physmem.readPktSize::5 0 # Read request sizes (log2)
-system.physmem.readPktSize::6 100046 # Read request sizes (log2)
+system.physmem.readPktSize::6 113588 # Read request sizes (log2)
system.physmem.writePktSize::0 0 # Write request sizes (log2)
system.physmem.writePktSize::1 0 # Write request sizes (log2)
system.physmem.writePktSize::2 0 # Write request sizes (log2)
system.physmem.writePktSize::3 0 # Write request sizes (log2)
system.physmem.writePktSize::4 0 # Write request sizes (log2)
system.physmem.writePktSize::5 0 # Write request sizes (log2)
-system.physmem.writePktSize::6 68732 # Write request sizes (log2)
-system.physmem.rdQLenPdf::0 76462 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::1 20947 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::2 2008 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::3 532 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::4 4 # What read queue length does an incoming req see
+system.physmem.writePktSize::6 68931 # Write request sizes (log2)
+system.physmem.rdQLenPdf::0 85837 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::1 24551 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::2 2500 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::3 585 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::4 3 # What read queue length does an incoming req see
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@@ -186,170 +194,173 @@ system.physmem.rdQLenPdf::28 0 # Wh
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-system.physmem.wrPerTurnAround::64-67 31 0.88% 98.53% # Writes before turning the bus around for reads
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-system.physmem.wrPerTurnAround::80-83 29 0.82% 99.83% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::100-103 1 0.03% 99.86% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::112-115 1 0.03% 99.89% # Writes before turning the bus around for reads
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-system.physmem.wrPerTurnAround::144-147 3 0.08% 100.00% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::total 3537 # Writes before turning the bus around for reads
-system.physmem.totQLat 1310437500 # Total ticks spent queuing
-system.physmem.totMemAccLat 3184556250 # Total ticks spent from burst creation until serviced by the DRAM
-system.physmem.totBusLat 499765000 # Total ticks spent in databus transfers
-system.physmem.avgQLat 13110.54 # Average queueing delay per DRAM burst
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+system.physmem.wrPerTurnAround::156-159 1 0.03% 100.00% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::total 3632 # Writes before turning the bus around for reads
+system.physmem.totQLat 1343217000 # Total ticks spent queuing
+system.physmem.totMemAccLat 3470892000 # Total ticks spent from burst creation until serviced by the DRAM
+system.physmem.totBusLat 567380000 # Total ticks spent in databus transfers
+system.physmem.avgQLat 11837.01 # Average queueing delay per DRAM burst
system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
-system.physmem.avgMemAccLat 31860.54 # Average memory access latency per DRAM burst
-system.physmem.avgRdBW 2.26 # Average DRAM read bandwidth in MiByte/s
+system.physmem.avgMemAccLat 30587.01 # Average memory access latency per DRAM burst
+system.physmem.avgRdBW 2.57 # Average DRAM read bandwidth in MiByte/s
system.physmem.avgWrBW 1.56 # Average achieved write bandwidth in MiByte/s
-system.physmem.avgRdBWSys 2.27 # Average system read bandwidth in MiByte/s
+system.physmem.avgRdBWSys 2.57 # Average system read bandwidth in MiByte/s
system.physmem.avgWrBWSys 1.56 # Average system write bandwidth in MiByte/s
system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil 0.03 # Data bus utilization in percentage
system.physmem.busUtilRead 0.02 # Data bus utilization in percentage for reads
system.physmem.busUtilWrite 0.01 # Data bus utilization in percentage for writes
-system.physmem.avgRdQLen 1.00 # Average read queue length when enqueuing
-system.physmem.avgWrQLen 28.41 # Average write queue length when enqueuing
-system.physmem.readRowHits 80619 # Number of row buffer hits during reads
-system.physmem.writeRowHits 48863 # Number of row buffer hits during writes
-system.physmem.readRowHitRate 80.66 # Row buffer hit rate for reads
-system.physmem.writeRowHitRate 71.09 # Row buffer hit rate for writes
-system.physmem.avgGap 16727764.68 # Average gap between requests
-system.physmem.pageHitRate 76.76 # Row buffer hit rate, read and write combined
-system.physmem_0.actEnergy 156219840 # Energy for activate commands per rank (pJ)
-system.physmem_0.preEnergy 85098750 # Energy for precharge commands per rank (pJ)
-system.physmem_0.readEnergy 402051000 # Energy for read commands per rank (pJ)
-system.physmem_0.writeEnergy 227525760 # Energy for write commands per rank (pJ)
-system.physmem_0.refreshEnergy 179782062720 # Energy for refresh commands per rank (pJ)
-system.physmem_0.actBackEnergy 73199813535 # Energy for active background per rank (pJ)
-system.physmem_0.preBackEnergy 1622867858250 # Energy for precharge background per rank (pJ)
-system.physmem_0.totalEnergy 1876720629855 # Total energy per rank (pJ)
-system.physmem_0.averagePower 667.445270 # Core power per rank (mW)
-system.physmem_0.memoryStateTime::IDLE 2640465319000 # Time in different power states
-system.physmem_0.memoryStateTime::REF 91913120000 # Time in different power states
+system.physmem.avgRdQLen 1.04 # Average read queue length when enqueuing
+system.physmem.avgWrQLen 22.43 # Average write queue length when enqueuing
+system.physmem.readRowHits 93570 # Number of row buffer hits during reads
+system.physmem.writeRowHits 49429 # Number of row buffer hits during writes
+system.physmem.readRowHitRate 82.46 # Row buffer hit rate for reads
+system.physmem.writeRowHitRate 71.71 # Row buffer hit rate for writes
+system.physmem.avgGap 15462261.38 # Average gap between requests
+system.physmem.pageHitRate 78.40 # Row buffer hit rate, read and write combined
+system.physmem_0.actEnergy 157845240 # Energy for activate commands per rank (pJ)
+system.physmem_0.preEnergy 85919625 # Energy for precharge commands per rank (pJ)
+system.physmem_0.readEnergy 459334200 # Energy for read commands per rank (pJ)
+system.physmem_0.writeEnergy 228024720 # Energy for write commands per rank (pJ)
+system.physmem_0.refreshEnergy 179708830080 # Energy for refresh commands per rank (pJ)
+system.physmem_0.actBackEnergy 71920019610 # Energy for active background per rank (pJ)
+system.physmem_0.preBackEnergy 1621544120250 # Energy for precharge background per rank (pJ)
+system.physmem_0.totalEnergy 1874104093725 # Total energy per rank (pJ)
+system.physmem_0.averagePower 667.482603 # Core power per rank (mW)
+system.physmem_0.memoryStateTime::IDLE 2641247036500 # Time in different power states
+system.physmem_0.memoryStateTime::REF 91875680000 # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem_0.memoryStateTime::ACT 20214084000 # Time in different power states
+system.physmem_0.memoryStateTime::ACT 18345228000 # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN 0 # Time in different power states
-system.physmem_1.actEnergy 140003640 # Energy for activate commands per rank (pJ)
-system.physmem_1.preEnergy 76213500 # Energy for precharge commands per rank (pJ)
-system.physmem_1.readEnergy 377559000 # Energy for read commands per rank (pJ)
-system.physmem_1.writeEnergy 217734480 # Energy for write commands per rank (pJ)
-system.physmem_1.refreshEnergy 179782062720 # Energy for refresh commands per rank (pJ)
-system.physmem_1.actBackEnergy 72425693970 # Energy for active background per rank (pJ)
-system.physmem_1.preBackEnergy 1619952048750 # Energy for precharge background per rank (pJ)
-system.physmem_1.totalEnergy 1872971316060 # Total energy per rank (pJ)
-system.physmem_1.averagePower 667.534243 # Core power per rank (mW)
-system.physmem_1.memoryStateTime::IDLE 2641598541500 # Time in different power states
-system.physmem_1.memoryStateTime::REF 91913120000 # Time in different power states
+system.physmem_1.actEnergy 139988520 # Energy for activate commands per rank (pJ)
+system.physmem_1.preEnergy 76201125 # Energy for precharge commands per rank (pJ)
+system.physmem_1.readEnergy 425778600 # Energy for read commands per rank (pJ)
+system.physmem_1.writeEnergy 218570400 # Energy for write commands per rank (pJ)
+system.physmem_1.refreshEnergy 179708830080 # Energy for refresh commands per rank (pJ)
+system.physmem_1.actBackEnergy 71085149730 # Energy for active background per rank (pJ)
+system.physmem_1.preBackEnergy 1620445707000 # Energy for precharge background per rank (pJ)
+system.physmem_1.totalEnergy 1872100225455 # Total energy per rank (pJ)
+system.physmem_1.averagePower 667.494295 # Core power per rank (mW)
+system.physmem_1.memoryStateTime::IDLE 2642466728000 # Time in different power states
+system.physmem_1.memoryStateTime::REF 91875680000 # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem_1.memoryStateTime::ACT 19069290500 # Time in different power states
+system.physmem_1.memoryStateTime::ACT 17119309500 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory
system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory
@@ -399,47 +410,47 @@ system.cpu0.dstage2_mmu.stage2_tlb.inst_accesses 0
system.cpu0.dstage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu0.dstage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu0.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses
-system.cpu0.dtb.walker.walks 4956 # Table walker walks requested
-system.cpu0.dtb.walker.walksShort 4956 # Table walker walks initiated with short descriptors
-system.cpu0.dtb.walker.walkWaitTime::samples 4956 # Table walker wait (enqueue to first request) latency
-system.cpu0.dtb.walker.walkWaitTime::0 4956 100.00% 100.00% # Table walker wait (enqueue to first request) latency
-system.cpu0.dtb.walker.walkWaitTime::total 4956 # Table walker wait (enqueue to first request) latency
-system.cpu0.dtb.walker.walksPending::samples 57378111376 # Table walker pending requests distribution
-system.cpu0.dtb.walker.walksPending::mean 1.254714 # Table walker pending requests distribution
-system.cpu0.dtb.walker.walksPending::0 -14615003624 -25.47% -25.47% # Table walker pending requests distribution
-system.cpu0.dtb.walker.walksPending::1 71993115000 125.47% 100.00% # Table walker pending requests distribution
-system.cpu0.dtb.walker.walksPending::total 57378111376 # Table walker pending requests distribution
-system.cpu0.dtb.walker.walkPageSizes::4K 2714 66.86% 66.86% # Table walker page sizes translated
-system.cpu0.dtb.walker.walkPageSizes::1M 1345 33.14% 100.00% # Table walker page sizes translated
-system.cpu0.dtb.walker.walkPageSizes::total 4059 # Table walker page sizes translated
-system.cpu0.dtb.walker.walkRequestOrigin_Requested::Data 4956 # Table walker requests started/completed, data/inst
+system.cpu0.dtb.walker.walks 4971 # Table walker walks requested
+system.cpu0.dtb.walker.walksShort 4971 # Table walker walks initiated with short descriptors
+system.cpu0.dtb.walker.walkWaitTime::samples 4971 # Table walker wait (enqueue to first request) latency
+system.cpu0.dtb.walker.walkWaitTime::0 4971 100.00% 100.00% # Table walker wait (enqueue to first request) latency
+system.cpu0.dtb.walker.walkWaitTime::total 4971 # Table walker wait (enqueue to first request) latency
+system.cpu0.dtb.walker.walksPending::samples 56876140626 # Table walker pending requests distribution
+system.cpu0.dtb.walker.walksPending::mean 1.265788 # Table walker pending requests distribution
+system.cpu0.dtb.walker.walksPending::0 -15117011624 -26.58% -26.58% # Table walker pending requests distribution
+system.cpu0.dtb.walker.walksPending::1 71993152250 126.58% 100.00% # Table walker pending requests distribution
+system.cpu0.dtb.walker.walksPending::total 56876140626 # Table walker pending requests distribution
+system.cpu0.dtb.walker.walkPageSizes::4K 2795 68.19% 68.19% # Table walker page sizes translated
+system.cpu0.dtb.walker.walkPageSizes::1M 1304 31.81% 100.00% # Table walker page sizes translated
+system.cpu0.dtb.walker.walkPageSizes::total 4099 # Table walker page sizes translated
+system.cpu0.dtb.walker.walkRequestOrigin_Requested::Data 4971 # Table walker requests started/completed, data/inst
system.cpu0.dtb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
-system.cpu0.dtb.walker.walkRequestOrigin_Requested::total 4956 # Table walker requests started/completed, data/inst
-system.cpu0.dtb.walker.walkRequestOrigin_Completed::Data 4059 # Table walker requests started/completed, data/inst
+system.cpu0.dtb.walker.walkRequestOrigin_Requested::total 4971 # Table walker requests started/completed, data/inst
+system.cpu0.dtb.walker.walkRequestOrigin_Completed::Data 4099 # Table walker requests started/completed, data/inst
system.cpu0.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
-system.cpu0.dtb.walker.walkRequestOrigin_Completed::total 4059 # Table walker requests started/completed, data/inst
-system.cpu0.dtb.walker.walkRequestOrigin::total 9015 # Table walker requests started/completed, data/inst
+system.cpu0.dtb.walker.walkRequestOrigin_Completed::total 4099 # Table walker requests started/completed, data/inst
+system.cpu0.dtb.walker.walkRequestOrigin::total 9070 # Table walker requests started/completed, data/inst
system.cpu0.dtb.inst_hits 0 # ITB inst hits
system.cpu0.dtb.inst_misses 0 # ITB inst misses
-system.cpu0.dtb.read_hits 12035291 # DTB read hits
-system.cpu0.dtb.read_misses 4159 # DTB read misses
-system.cpu0.dtb.write_hits 9387286 # DTB write hits
-system.cpu0.dtb.write_misses 797 # DTB write misses
-system.cpu0.dtb.flush_tlb 170 # Number of times complete TLB was flushed
-system.cpu0.dtb.flush_tlb_mva 344 # Number of times TLB was flushed by MVA
+system.cpu0.dtb.read_hits 12098970 # DTB read hits
+system.cpu0.dtb.read_misses 4249 # DTB read misses
+system.cpu0.dtb.write_hits 9143698 # DTB write hits
+system.cpu0.dtb.write_misses 722 # DTB write misses
+system.cpu0.dtb.flush_tlb 171 # Number of times complete TLB was flushed
+system.cpu0.dtb.flush_tlb_mva 362 # Number of times TLB was flushed by MVA
system.cpu0.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu0.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
-system.cpu0.dtb.flush_entries 2853 # Number of entries that have been flushed from TLB
+system.cpu0.dtb.flush_entries 2823 # Number of entries that have been flushed from TLB
system.cpu0.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions
-system.cpu0.dtb.prefetch_faults 725 # Number of TLB faults due to prefetch
+system.cpu0.dtb.prefetch_faults 830 # Number of TLB faults due to prefetch
system.cpu0.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions
-system.cpu0.dtb.perms_faults 165 # Number of TLB faults due to permissions restrictions
-system.cpu0.dtb.read_accesses 12039450 # DTB read accesses
-system.cpu0.dtb.write_accesses 9388083 # DTB write accesses
+system.cpu0.dtb.perms_faults 174 # Number of TLB faults due to permissions restrictions
+system.cpu0.dtb.read_accesses 12103219 # DTB read accesses
+system.cpu0.dtb.write_accesses 9144420 # DTB write accesses
system.cpu0.dtb.inst_accesses 0 # ITB inst accesses
-system.cpu0.dtb.hits 21422577 # DTB hits
-system.cpu0.dtb.misses 4956 # DTB misses
-system.cpu0.dtb.accesses 21427533 # DTB accesses
+system.cpu0.dtb.hits 21242668 # DTB hits
+system.cpu0.dtb.misses 4971 # DTB misses
+system.cpu0.dtb.accesses 21247639 # DTB accesses
system.cpu0.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
system.cpu0.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu0.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
@@ -469,639 +480,639 @@ system.cpu0.istage2_mmu.stage2_tlb.inst_accesses 0
system.cpu0.istage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu0.istage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu0.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses
-system.cpu0.itb.walker.walks 2296 # Table walker walks requested
-system.cpu0.itb.walker.walksShort 2296 # Table walker walks initiated with short descriptors
-system.cpu0.itb.walker.walkWaitTime::samples 2296 # Table walker wait (enqueue to first request) latency
-system.cpu0.itb.walker.walkWaitTime::0 2296 100.00% 100.00% # Table walker wait (enqueue to first request) latency
-system.cpu0.itb.walker.walkWaitTime::total 2296 # Table walker wait (enqueue to first request) latency
-system.cpu0.itb.walker.walksPending::samples 57378111376 # Table walker pending requests distribution
-system.cpu0.itb.walker.walksPending::mean 1.254717 # Table walker pending requests distribution
-system.cpu0.itb.walker.walksPending::0 -14615152624 -25.47% -25.47% # Table walker pending requests distribution
-system.cpu0.itb.walker.walksPending::1 71993264000 125.47% 100.00% # Table walker pending requests distribution
-system.cpu0.itb.walker.walksPending::total 57378111376 # Table walker pending requests distribution
-system.cpu0.itb.walker.walkPageSizes::4K 1260 74.03% 74.03% # Table walker page sizes translated
-system.cpu0.itb.walker.walkPageSizes::1M 442 25.97% 100.00% # Table walker page sizes translated
-system.cpu0.itb.walker.walkPageSizes::total 1702 # Table walker page sizes translated
+system.cpu0.itb.walker.walks 2431 # Table walker walks requested
+system.cpu0.itb.walker.walksShort 2431 # Table walker walks initiated with short descriptors
+system.cpu0.itb.walker.walkWaitTime::samples 2431 # Table walker wait (enqueue to first request) latency
+system.cpu0.itb.walker.walkWaitTime::0 2431 100.00% 100.00% # Table walker wait (enqueue to first request) latency
+system.cpu0.itb.walker.walkWaitTime::total 2431 # Table walker wait (enqueue to first request) latency
+system.cpu0.itb.walker.walksPending::samples 56876140626 # Table walker pending requests distribution
+system.cpu0.itb.walker.walksPending::mean 1.265790 # Table walker pending requests distribution
+system.cpu0.itb.walker.walksPending::0 -15117125624 -26.58% -26.58% # Table walker pending requests distribution
+system.cpu0.itb.walker.walksPending::1 71993266250 126.58% 100.00% # Table walker pending requests distribution
+system.cpu0.itb.walker.walksPending::total 56876140626 # Table walker pending requests distribution
+system.cpu0.itb.walker.walkPageSizes::4K 1312 74.72% 74.72% # Table walker page sizes translated
+system.cpu0.itb.walker.walkPageSizes::1M 444 25.28% 100.00% # Table walker page sizes translated
+system.cpu0.itb.walker.walkPageSizes::total 1756 # Table walker page sizes translated
system.cpu0.itb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
-system.cpu0.itb.walker.walkRequestOrigin_Requested::Inst 2296 # Table walker requests started/completed, data/inst
-system.cpu0.itb.walker.walkRequestOrigin_Requested::total 2296 # Table walker requests started/completed, data/inst
+system.cpu0.itb.walker.walkRequestOrigin_Requested::Inst 2431 # Table walker requests started/completed, data/inst
+system.cpu0.itb.walker.walkRequestOrigin_Requested::total 2431 # Table walker requests started/completed, data/inst
system.cpu0.itb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
-system.cpu0.itb.walker.walkRequestOrigin_Completed::Inst 1702 # Table walker requests started/completed, data/inst
-system.cpu0.itb.walker.walkRequestOrigin_Completed::total 1702 # Table walker requests started/completed, data/inst
-system.cpu0.itb.walker.walkRequestOrigin::total 3998 # Table walker requests started/completed, data/inst
-system.cpu0.itb.inst_hits 57357196 # ITB inst hits
-system.cpu0.itb.inst_misses 2296 # ITB inst misses
+system.cpu0.itb.walker.walkRequestOrigin_Completed::Inst 1756 # Table walker requests started/completed, data/inst
+system.cpu0.itb.walker.walkRequestOrigin_Completed::total 1756 # Table walker requests started/completed, data/inst
+system.cpu0.itb.walker.walkRequestOrigin::total 4187 # Table walker requests started/completed, data/inst
+system.cpu0.itb.inst_hits 56920666 # ITB inst hits
+system.cpu0.itb.inst_misses 2431 # ITB inst misses
system.cpu0.itb.read_hits 0 # DTB read hits
system.cpu0.itb.read_misses 0 # DTB read misses
system.cpu0.itb.write_hits 0 # DTB write hits
system.cpu0.itb.write_misses 0 # DTB write misses
-system.cpu0.itb.flush_tlb 170 # Number of times complete TLB was flushed
-system.cpu0.itb.flush_tlb_mva 344 # Number of times TLB was flushed by MVA
+system.cpu0.itb.flush_tlb 171 # Number of times complete TLB was flushed
+system.cpu0.itb.flush_tlb_mva 362 # Number of times TLB was flushed by MVA
system.cpu0.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu0.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
-system.cpu0.itb.flush_entries 1708 # Number of entries that have been flushed from TLB
+system.cpu0.itb.flush_entries 1759 # Number of entries that have been flushed from TLB
system.cpu0.itb.align_faults 0 # Number of TLB faults due to alignment restrictions
system.cpu0.itb.prefetch_faults 0 # Number of TLB faults due to prefetch
system.cpu0.itb.domain_faults 0 # Number of TLB faults due to domain restrictions
system.cpu0.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions
system.cpu0.itb.read_accesses 0 # DTB read accesses
system.cpu0.itb.write_accesses 0 # DTB write accesses
-system.cpu0.itb.inst_accesses 57359492 # ITB inst accesses
-system.cpu0.itb.hits 57357196 # DTB hits
-system.cpu0.itb.misses 2296 # DTB misses
-system.cpu0.itb.accesses 57359492 # DTB accesses
-system.cpu0.numCycles 69413201 # number of cpu cycles simulated
+system.cpu0.itb.inst_accesses 56923097 # ITB inst accesses
+system.cpu0.itb.hits 56920666 # DTB hits
+system.cpu0.itb.misses 2431 # DTB misses
+system.cpu0.itb.accesses 56923097 # DTB accesses
+system.cpu0.numCycles 68768248 # number of cpu cycles simulated
system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
-system.cpu0.kern.inst.quiesce 3088 # number of quiesce instructions executed
-system.cpu0.committedInsts 55950800 # Number of instructions committed
-system.cpu0.committedOps 67895777 # Number of ops (including micro ops) committed
-system.cpu0.num_int_alu_accesses 59559088 # Number of integer alu accesses
-system.cpu0.num_fp_alu_accesses 4429 # Number of float alu accesses
-system.cpu0.num_func_calls 5748539 # number of times a function call or return occured
-system.cpu0.num_conditional_control_insts 7418498 # number of instructions that are conditional controls
-system.cpu0.num_int_insts 59559088 # number of integer instructions
-system.cpu0.num_fp_insts 4429 # number of float instructions
-system.cpu0.num_int_register_reads 109971177 # number of times the integer registers were read
-system.cpu0.num_int_register_writes 41296104 # number of times the integer registers were written
-system.cpu0.num_fp_register_reads 3323 # number of times the floating registers were read
-system.cpu0.num_fp_register_writes 1108 # number of times the floating registers were written
-system.cpu0.num_cc_register_reads 206667117 # number of times the CC registers were read
-system.cpu0.num_cc_register_writes 25287808 # number of times the CC registers were written
-system.cpu0.num_mem_refs 21990141 # number of memory refs
-system.cpu0.num_load_insts 12179891 # Number of load instructions
-system.cpu0.num_store_insts 9810250 # Number of store instructions
-system.cpu0.num_idle_cycles 65532353.686303 # Number of idle cycles
-system.cpu0.num_busy_cycles 3880847.313697 # Number of busy cycles
-system.cpu0.not_idle_fraction 0.055909 # Percentage of non-idle cycles
-system.cpu0.idle_fraction 0.944091 # Percentage of idle cycles
-system.cpu0.Branches 13556608 # Number of branches fetched
-system.cpu0.op_class::No_OpClass 2177 0.00% 0.00% # Class of executed instruction
-system.cpu0.op_class::IntAlu 46939668 68.04% 68.05% # Class of executed instruction
-system.cpu0.op_class::IntMult 49866 0.07% 68.12% # Class of executed instruction
-system.cpu0.op_class::IntDiv 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::FloatAdd 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::FloatCmp 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::FloatCvt 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::FloatMult 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::FloatDiv 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::FloatSqrt 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdAdd 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdAddAcc 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdAlu 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdCmp 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdCvt 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdMisc 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdMult 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdMultAcc 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdShift 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdShiftAcc 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdSqrt 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdFloatAdd 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdFloatAlu 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdFloatCmp 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdFloatCvt 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdFloatDiv 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdFloatMisc 3817 0.01% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdFloatMult 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::SimdFloatSqrt 0 0.00% 68.12% # Class of executed instruction
-system.cpu0.op_class::MemRead 12179891 17.66% 85.78% # Class of executed instruction
-system.cpu0.op_class::MemWrite 9810250 14.22% 100.00% # Class of executed instruction
+system.cpu0.kern.inst.quiesce 3086 # number of quiesce instructions executed
+system.cpu0.committedInsts 55456471 # Number of instructions committed
+system.cpu0.committedOps 67221308 # Number of ops (including micro ops) committed
+system.cpu0.num_int_alu_accesses 58995481 # Number of integer alu accesses
+system.cpu0.num_fp_alu_accesses 4380 # Number of float alu accesses
+system.cpu0.num_func_calls 5787158 # number of times a function call or return occured
+system.cpu0.num_conditional_control_insts 7357632 # number of instructions that are conditional controls
+system.cpu0.num_int_insts 58995481 # number of integer instructions
+system.cpu0.num_fp_insts 4380 # number of float instructions
+system.cpu0.num_int_register_reads 108779991 # number of times the integer registers were read
+system.cpu0.num_int_register_writes 41129871 # number of times the integer registers were written
+system.cpu0.num_fp_register_reads 3339 # number of times the floating registers were read
+system.cpu0.num_fp_register_writes 1042 # number of times the floating registers were written
+system.cpu0.num_cc_register_reads 204568240 # number of times the CC registers were read
+system.cpu0.num_cc_register_writes 24713959 # number of times the CC registers were written
+system.cpu0.num_mem_refs 21830038 # number of memory refs
+system.cpu0.num_load_insts 12248052 # Number of load instructions
+system.cpu0.num_store_insts 9581986 # Number of store instructions
+system.cpu0.num_idle_cycles 64949431.464966 # Number of idle cycles
+system.cpu0.num_busy_cycles 3818816.535034 # Number of busy cycles
+system.cpu0.not_idle_fraction 0.055532 # Percentage of non-idle cycles
+system.cpu0.idle_fraction 0.944468 # Percentage of idle cycles
+system.cpu0.Branches 13461051 # Number of branches fetched
+system.cpu0.op_class::No_OpClass 2178 0.00% 0.00% # Class of executed instruction
+system.cpu0.op_class::IntAlu 46425629 67.96% 67.96% # Class of executed instruction
+system.cpu0.op_class::IntMult 50781 0.07% 68.04% # Class of executed instruction
+system.cpu0.op_class::IntDiv 0 0.00% 68.04% # Class of executed instruction
+system.cpu0.op_class::FloatAdd 0 0.00% 68.04% # Class of executed instruction
+system.cpu0.op_class::FloatCmp 0 0.00% 68.04% # Class of executed instruction
+system.cpu0.op_class::FloatCvt 0 0.00% 68.04% # Class of executed instruction
+system.cpu0.op_class::FloatMult 0 0.00% 68.04% # Class of executed instruction
+system.cpu0.op_class::FloatDiv 0 0.00% 68.04% # Class of executed instruction
+system.cpu0.op_class::FloatSqrt 0 0.00% 68.04% # Class of executed instruction
+system.cpu0.op_class::SimdAdd 0 0.00% 68.04% # Class of executed instruction
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-system.cpu0.dcache.ReadReq_mshr_uncacheable_latency::cpu2.data 1118645000 # number of ReadReq MSHR uncacheable cycles
-system.cpu0.dcache.ReadReq_mshr_uncacheable_latency::cpu3.data 1808848000 # number of ReadReq MSHR uncacheable cycles
-system.cpu0.dcache.ReadReq_mshr_uncacheable_latency::total 3556602500 # number of ReadReq MSHR uncacheable cycles
-system.cpu0.dcache.overall_mshr_uncacheable_latency::cpu1.data 629109500 # number of overall MSHR uncacheable cycles
-system.cpu0.dcache.overall_mshr_uncacheable_latency::cpu2.data 1118645000 # number of overall MSHR uncacheable cycles
-system.cpu0.dcache.overall_mshr_uncacheable_latency::cpu3.data 1808848000 # number of overall MSHR uncacheable cycles
-system.cpu0.dcache.overall_mshr_uncacheable_latency::total 3556602500 # number of overall MSHR uncacheable cycles
-system.cpu0.dcache.ReadReq_mshr_miss_rate::cpu1.data 0.015174 # mshr miss rate for ReadReq accesses
-system.cpu0.dcache.ReadReq_mshr_miss_rate::cpu2.data 0.018086 # mshr miss rate for ReadReq accesses
-system.cpu0.dcache.ReadReq_mshr_miss_rate::cpu3.data 0.016790 # mshr miss rate for ReadReq accesses
-system.cpu0.dcache.ReadReq_mshr_miss_rate::total 0.009391 # mshr miss rate for ReadReq accesses
-system.cpu0.dcache.WriteReq_mshr_miss_rate::cpu1.data 0.011332 # mshr miss rate for WriteReq accesses
-system.cpu0.dcache.WriteReq_mshr_miss_rate::cpu2.data 0.015450 # mshr miss rate for WriteReq accesses
-system.cpu0.dcache.WriteReq_mshr_miss_rate::cpu3.data 0.017506 # mshr miss rate for WriteReq accesses
-system.cpu0.dcache.WriteReq_mshr_miss_rate::total 0.008438 # mshr miss rate for WriteReq accesses
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-system.cpu0.dcache.SoftPFReq_mshr_miss_rate::cpu2.data 0.209461 # mshr miss rate for SoftPFReq accesses
-system.cpu0.dcache.SoftPFReq_mshr_miss_rate::cpu3.data 0.225402 # mshr miss rate for SoftPFReq accesses
-system.cpu0.dcache.SoftPFReq_mshr_miss_rate::total 0.130193 # mshr miss rate for SoftPFReq accesses
-system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::cpu1.data 0.013171 # mshr miss rate for LoadLockedReq accesses
-system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::cpu2.data 0.015432 # mshr miss rate for LoadLockedReq accesses
-system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::cpu3.data 0.025271 # mshr miss rate for LoadLockedReq accesses
-system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::total 0.010015 # mshr miss rate for LoadLockedReq accesses
-system.cpu0.dcache.StoreCondReq_mshr_miss_rate::cpu3.data 0.000273 # mshr miss rate for StoreCondReq accesses
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-system.cpu0.dcache.overall_mshr_miss_rate::cpu3.data 0.019297 # mshr miss rate for overall accesses
-system.cpu0.dcache.overall_mshr_miss_rate::total 0.010324 # mshr miss rate for overall accesses
-system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu1.data 17131.119965 # average ReadReq mshr miss latency
-system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu2.data 14546.692533 # average ReadReq mshr miss latency
-system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu3.data 15575.082678 # average ReadReq mshr miss latency
-system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 15600.312004 # average ReadReq mshr miss latency
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-system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::cpu2.data 66654.464791 # average WriteReq mshr miss latency
-system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::cpu3.data 72470.580857 # average WriteReq mshr miss latency
-system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::total 68347.707840 # average WriteReq mshr miss latency
-system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::cpu1.data 13247.159573 # average SoftPFReq mshr miss latency
-system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::cpu2.data 13908.850109 # average SoftPFReq mshr miss latency
-system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::cpu3.data 17403.134461 # average SoftPFReq mshr miss latency
-system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::total 15175.116153 # average SoftPFReq mshr miss latency
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-system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu2.data 16790.734824 # average LoadLockedReq mshr miss latency
-system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu3.data 16001.034340 # average LoadLockedReq mshr miss latency
-system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::total 16260.341151 # average LoadLockedReq mshr miss latency
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-system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 177764.764058 # average ReadReq mshr uncacheable latency
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-system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 113242.350431 # average overall mshr uncacheable latency
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-system.cpu0.icache.tags.tagsinuse 511.446081 # Cycle average of tags in use
-system.cpu0.icache.tags.total_refs 94017501 # Total number of references to valid blocks.
-system.cpu0.icache.tags.sampled_refs 1977811 # Sample count of references to valid blocks.
-system.cpu0.icache.tags.avg_refs 47.536140 # Average number of references to valid blocks.
-system.cpu0.icache.tags.warmup_cycle 12783647500 # Cycle when the warmup percentage was hit.
-system.cpu0.icache.tags.occ_blocks::cpu0.inst 433.555541 # Average occupied blocks per requestor
-system.cpu0.icache.tags.occ_blocks::cpu1.inst 10.959616 # Average occupied blocks per requestor
-system.cpu0.icache.tags.occ_blocks::cpu2.inst 24.981248 # Average occupied blocks per requestor
-system.cpu0.icache.tags.occ_blocks::cpu3.inst 41.949675 # Average occupied blocks per requestor
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system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
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system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked
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system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
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+system.cpu0.icache.demand_avg_mshr_miss_latency::cpu1.inst 12688.700584 # average overall mshr miss latency
+system.cpu0.icache.demand_avg_mshr_miss_latency::cpu2.inst 12829.404359 # average overall mshr miss latency
+system.cpu0.icache.demand_avg_mshr_miss_latency::cpu3.inst 12937.655406 # average overall mshr miss latency
+system.cpu0.icache.demand_avg_mshr_miss_latency::total 12853.021015 # average overall mshr miss latency
+system.cpu0.icache.overall_avg_mshr_miss_latency::cpu1.inst 12688.700584 # average overall mshr miss latency
+system.cpu0.icache.overall_avg_mshr_miss_latency::cpu2.inst 12829.404359 # average overall mshr miss latency
+system.cpu0.icache.overall_avg_mshr_miss_latency::cpu3.inst 12937.655406 # average overall mshr miss latency
+system.cpu0.icache.overall_avg_mshr_miss_latency::total 12853.021015 # average overall mshr miss latency
system.cpu1.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
@@ -1131,55 +1142,61 @@ system.cpu1.dstage2_mmu.stage2_tlb.inst_accesses 0
system.cpu1.dstage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu1.dstage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu1.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses
-system.cpu1.dtb.walker.walks 1898 # Table walker walks requested
-system.cpu1.dtb.walker.walksShort 1898 # Table walker walks initiated with short descriptors
-system.cpu1.dtb.walker.walksShortTerminationLevel::Level1 494 # Level at which table walker walks with short descriptors terminate
-system.cpu1.dtb.walker.walksShortTerminationLevel::Level2 1404 # Level at which table walker walks with short descriptors terminate
-system.cpu1.dtb.walker.walkWaitTime::samples 1898 # Table walker wait (enqueue to first request) latency
-system.cpu1.dtb.walker.walkWaitTime::0 1898 100.00% 100.00% # Table walker wait (enqueue to first request) latency
-system.cpu1.dtb.walker.walkWaitTime::total 1898 # Table walker wait (enqueue to first request) latency
-system.cpu1.dtb.walker.walkCompletionTime::samples 1607 # Table walker service (enqueue to completion) latency
-system.cpu1.dtb.walker.walkCompletionTime::mean 13317.672682 # Table walker service (enqueue to completion) latency
-system.cpu1.dtb.walker.walkCompletionTime::gmean 11568.146418 # Table walker service (enqueue to completion) latency
-system.cpu1.dtb.walker.walkCompletionTime::stdev 7309.305815 # Table walker service (enqueue to completion) latency
-system.cpu1.dtb.walker.walkCompletionTime::0-16383 1216 75.67% 75.67% # Table walker service (enqueue to completion) latency
-system.cpu1.dtb.walker.walkCompletionTime::16384-32767 390 24.27% 99.94% # Table walker service (enqueue to completion) latency
-system.cpu1.dtb.walker.walkCompletionTime::131072-147455 1 0.06% 100.00% # Table walker service (enqueue to completion) latency
-system.cpu1.dtb.walker.walkCompletionTime::total 1607 # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walks 2016 # Table walker walks requested
+system.cpu1.dtb.walker.walksShort 2016 # Table walker walks initiated with short descriptors
+system.cpu1.dtb.walker.walksShortTerminationLevel::Level1 564 # Level at which table walker walks with short descriptors terminate
+system.cpu1.dtb.walker.walksShortTerminationLevel::Level2 1452 # Level at which table walker walks with short descriptors terminate
+system.cpu1.dtb.walker.walkWaitTime::samples 2016 # Table walker wait (enqueue to first request) latency
+system.cpu1.dtb.walker.walkWaitTime::0 2016 100.00% 100.00% # Table walker wait (enqueue to first request) latency
+system.cpu1.dtb.walker.walkWaitTime::total 2016 # Table walker wait (enqueue to first request) latency
+system.cpu1.dtb.walker.walkCompletionTime::samples 1645 # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::mean 12118.844985 # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::gmean 10271.833283 # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::stdev 6851.972198 # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::2048-4095 15 0.91% 0.91% # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::4096-6143 468 28.45% 29.36% # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::6144-8191 121 7.36% 36.72% # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::10240-12287 510 31.00% 67.72% # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::12288-14335 106 6.44% 74.16% # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::14336-16383 70 4.26% 78.42% # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::16384-18431 12 0.73% 79.15% # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::22528-24575 321 19.51% 98.66% # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::24576-26623 22 1.34% 100.00% # Table walker service (enqueue to completion) latency
+system.cpu1.dtb.walker.walkCompletionTime::total 1645 # Table walker service (enqueue to completion) latency
system.cpu1.dtb.walker.walksPending::samples 1000016000 # Table walker pending requests distribution
system.cpu1.dtb.walker.walksPending::0 1000016000 100.00% 100.00% # Table walker pending requests distribution
system.cpu1.dtb.walker.walksPending::total 1000016000 # Table walker pending requests distribution
-system.cpu1.dtb.walker.walkPageSizes::4K 1115 69.38% 69.38% # Table walker page sizes translated
-system.cpu1.dtb.walker.walkPageSizes::1M 492 30.62% 100.00% # Table walker page sizes translated
-system.cpu1.dtb.walker.walkPageSizes::total 1607 # Table walker page sizes translated
-system.cpu1.dtb.walker.walkRequestOrigin_Requested::Data 1898 # Table walker requests started/completed, data/inst
+system.cpu1.dtb.walker.walkPageSizes::4K 1089 66.20% 66.20% # Table walker page sizes translated
+system.cpu1.dtb.walker.walkPageSizes::1M 556 33.80% 100.00% # Table walker page sizes translated
+system.cpu1.dtb.walker.walkPageSizes::total 1645 # Table walker page sizes translated
+system.cpu1.dtb.walker.walkRequestOrigin_Requested::Data 2016 # Table walker requests started/completed, data/inst
system.cpu1.dtb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
-system.cpu1.dtb.walker.walkRequestOrigin_Requested::total 1898 # Table walker requests started/completed, data/inst
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system.cpu1.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
-system.cpu1.dtb.walker.walkRequestOrigin_Completed::total 1607 # Table walker requests started/completed, data/inst
-system.cpu1.dtb.walker.walkRequestOrigin::total 3505 # Table walker requests started/completed, data/inst
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+system.cpu1.dtb.walker.walkRequestOrigin::total 3661 # Table walker requests started/completed, data/inst
system.cpu1.dtb.inst_hits 0 # ITB inst hits
system.cpu1.dtb.inst_misses 0 # ITB inst misses
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-system.cpu1.dtb.read_misses 1673 # DTB read misses
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-system.cpu1.dtb.write_misses 225 # DTB write misses
-system.cpu1.dtb.flush_tlb 151 # Number of times complete TLB was flushed
-system.cpu1.dtb.flush_tlb_mva 137 # Number of times TLB was flushed by MVA
+system.cpu1.dtb.read_hits 3812918 # DTB read hits
+system.cpu1.dtb.read_misses 1745 # DTB read misses
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+system.cpu1.dtb.flush_tlb_mva 179 # Number of times TLB was flushed by MVA
system.cpu1.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu1.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
-system.cpu1.dtb.flush_entries 1104 # Number of entries that have been flushed from TLB
+system.cpu1.dtb.flush_entries 1302 # Number of entries that have been flushed from TLB
system.cpu1.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions
-system.cpu1.dtb.prefetch_faults 238 # Number of TLB faults due to prefetch
+system.cpu1.dtb.prefetch_faults 243 # Number of TLB faults due to prefetch
system.cpu1.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions
-system.cpu1.dtb.perms_faults 65 # Number of TLB faults due to permissions restrictions
-system.cpu1.dtb.read_accesses 3877194 # DTB read accesses
-system.cpu1.dtb.write_accesses 2730750 # DTB write accesses
+system.cpu1.dtb.perms_faults 87 # Number of TLB faults due to permissions restrictions
+system.cpu1.dtb.read_accesses 3814663 # DTB read accesses
+system.cpu1.dtb.write_accesses 2796557 # DTB write accesses
system.cpu1.dtb.inst_accesses 0 # ITB inst accesses
-system.cpu1.dtb.hits 6606046 # DTB hits
-system.cpu1.dtb.misses 1898 # DTB misses
-system.cpu1.dtb.accesses 6607944 # DTB accesses
+system.cpu1.dtb.hits 6609204 # DTB hits
+system.cpu1.dtb.misses 2016 # DTB misses
+system.cpu1.dtb.accesses 6611220 # DTB accesses
system.cpu1.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
system.cpu1.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu1.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
@@ -1209,134 +1226,134 @@ system.cpu1.istage2_mmu.stage2_tlb.inst_accesses 0
system.cpu1.istage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu1.istage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu1.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses
-system.cpu1.itb.walker.walks 937 # Table walker walks requested
-system.cpu1.itb.walker.walksShort 937 # Table walker walks initiated with short descriptors
-system.cpu1.itb.walker.walksShortTerminationLevel::Level1 181 # Level at which table walker walks with short descriptors terminate
-system.cpu1.itb.walker.walksShortTerminationLevel::Level2 756 # Level at which table walker walks with short descriptors terminate
-system.cpu1.itb.walker.walkWaitTime::samples 937 # Table walker wait (enqueue to first request) latency
-system.cpu1.itb.walker.walkWaitTime::0 937 100.00% 100.00% # Table walker wait (enqueue to first request) latency
-system.cpu1.itb.walker.walkWaitTime::total 937 # Table walker wait (enqueue to first request) latency
-system.cpu1.itb.walker.walkCompletionTime::samples 679 # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::mean 12754.050074 # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::gmean 11061.595827 # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::stdev 6405.303661 # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::4096-6143 193 28.42% 28.42% # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::6144-8191 2 0.29% 28.72% # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::10240-12287 178 26.22% 54.93% # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::12288-14335 59 8.69% 63.62% # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::14336-16383 121 17.82% 81.44% # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::22528-24575 122 17.97% 99.41% # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::24576-26623 4 0.59% 100.00% # Table walker service (enqueue to completion) latency
-system.cpu1.itb.walker.walkCompletionTime::total 679 # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walks 1033 # Table walker walks requested
+system.cpu1.itb.walker.walksShort 1033 # Table walker walks initiated with short descriptors
+system.cpu1.itb.walker.walksShortTerminationLevel::Level1 205 # Level at which table walker walks with short descriptors terminate
+system.cpu1.itb.walker.walksShortTerminationLevel::Level2 828 # Level at which table walker walks with short descriptors terminate
+system.cpu1.itb.walker.walkWaitTime::samples 1033 # Table walker wait (enqueue to first request) latency
+system.cpu1.itb.walker.walkWaitTime::0 1033 100.00% 100.00% # Table walker wait (enqueue to first request) latency
+system.cpu1.itb.walker.walkWaitTime::total 1033 # Table walker wait (enqueue to first request) latency
+system.cpu1.itb.walker.walkCompletionTime::samples 765 # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::mean 12816.993464 # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::gmean 10782.034364 # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::stdev 7152.863364 # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::4096-6143 258 33.73% 33.73% # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::10240-12287 199 26.01% 59.74% # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::12288-14335 58 7.58% 67.32% # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::14336-16383 58 7.58% 74.90% # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::16384-18431 1 0.13% 75.03% # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::22528-24575 183 23.92% 98.95% # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::24576-26623 8 1.05% 100.00% # Table walker service (enqueue to completion) latency
+system.cpu1.itb.walker.walkCompletionTime::total 765 # Table walker service (enqueue to completion) latency
system.cpu1.itb.walker.walksPending::samples 1000000500 # Table walker pending requests distribution
system.cpu1.itb.walker.walksPending::0 1000000500 100.00% 100.00% # Table walker pending requests distribution
system.cpu1.itb.walker.walksPending::total 1000000500 # Table walker pending requests distribution
-system.cpu1.itb.walker.walkPageSizes::4K 498 73.34% 73.34% # Table walker page sizes translated
-system.cpu1.itb.walker.walkPageSizes::1M 181 26.66% 100.00% # Table walker page sizes translated
-system.cpu1.itb.walker.walkPageSizes::total 679 # Table walker page sizes translated
+system.cpu1.itb.walker.walkPageSizes::4K 560 73.20% 73.20% # Table walker page sizes translated
+system.cpu1.itb.walker.walkPageSizes::1M 205 26.80% 100.00% # Table walker page sizes translated
+system.cpu1.itb.walker.walkPageSizes::total 765 # Table walker page sizes translated
system.cpu1.itb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
-system.cpu1.itb.walker.walkRequestOrigin_Requested::Inst 937 # Table walker requests started/completed, data/inst
-system.cpu1.itb.walker.walkRequestOrigin_Requested::total 937 # Table walker requests started/completed, data/inst
+system.cpu1.itb.walker.walkRequestOrigin_Requested::Inst 1033 # Table walker requests started/completed, data/inst
+system.cpu1.itb.walker.walkRequestOrigin_Requested::total 1033 # Table walker requests started/completed, data/inst
system.cpu1.itb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
-system.cpu1.itb.walker.walkRequestOrigin_Completed::Inst 679 # Table walker requests started/completed, data/inst
-system.cpu1.itb.walker.walkRequestOrigin_Completed::total 679 # Table walker requests started/completed, data/inst
-system.cpu1.itb.walker.walkRequestOrigin::total 1616 # Table walker requests started/completed, data/inst
-system.cpu1.itb.inst_hits 18092471 # ITB inst hits
-system.cpu1.itb.inst_misses 937 # ITB inst misses
+system.cpu1.itb.walker.walkRequestOrigin_Completed::Inst 765 # Table walker requests started/completed, data/inst
+system.cpu1.itb.walker.walkRequestOrigin_Completed::total 765 # Table walker requests started/completed, data/inst
+system.cpu1.itb.walker.walkRequestOrigin::total 1798 # Table walker requests started/completed, data/inst
+system.cpu1.itb.inst_hits 17860427 # ITB inst hits
+system.cpu1.itb.inst_misses 1033 # ITB inst misses
system.cpu1.itb.read_hits 0 # DTB read hits
system.cpu1.itb.read_misses 0 # DTB read misses
system.cpu1.itb.write_hits 0 # DTB write hits
system.cpu1.itb.write_misses 0 # DTB write misses
-system.cpu1.itb.flush_tlb 151 # Number of times complete TLB was flushed
-system.cpu1.itb.flush_tlb_mva 137 # Number of times TLB was flushed by MVA
+system.cpu1.itb.flush_tlb 154 # Number of times complete TLB was flushed
+system.cpu1.itb.flush_tlb_mva 179 # Number of times TLB was flushed by MVA
system.cpu1.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu1.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
-system.cpu1.itb.flush_entries 710 # Number of entries that have been flushed from TLB
+system.cpu1.itb.flush_entries 792 # Number of entries that have been flushed from TLB
system.cpu1.itb.align_faults 0 # Number of TLB faults due to alignment restrictions
system.cpu1.itb.prefetch_faults 0 # Number of TLB faults due to prefetch
system.cpu1.itb.domain_faults 0 # Number of TLB faults due to domain restrictions
system.cpu1.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions
system.cpu1.itb.read_accesses 0 # DTB read accesses
system.cpu1.itb.write_accesses 0 # DTB write accesses
-system.cpu1.itb.inst_accesses 18093408 # ITB inst accesses
-system.cpu1.itb.hits 18092471 # DTB hits
-system.cpu1.itb.misses 937 # DTB misses
-system.cpu1.itb.accesses 18093408 # DTB accesses
-system.cpu1.numCycles 144009903 # number of cpu cycles simulated
+system.cpu1.itb.inst_accesses 17861460 # ITB inst accesses
+system.cpu1.itb.hits 17860427 # DTB hits
+system.cpu1.itb.misses 1033 # DTB misses
+system.cpu1.itb.accesses 17861460 # DTB accesses
+system.cpu1.numCycles 143797366 # number of cpu cycles simulated
system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
-system.cpu1.committedInsts 17421457 # Number of instructions committed
-system.cpu1.committedOps 20899652 # Number of ops (including micro ops) committed
-system.cpu1.num_int_alu_accesses 18577744 # Number of integer alu accesses
-system.cpu1.num_fp_alu_accesses 1420 # Number of float alu accesses
-system.cpu1.num_func_calls 1993615 # number of times a function call or return occured
-system.cpu1.num_conditional_control_insts 2230860 # number of instructions that are conditional controls
-system.cpu1.num_int_insts 18577744 # number of integer instructions
-system.cpu1.num_fp_insts 1420 # number of float instructions
-system.cpu1.num_int_register_reads 34369524 # number of times the integer registers were read
-system.cpu1.num_int_register_writes 13035923 # number of times the integer registers were written
-system.cpu1.num_fp_register_reads 1160 # number of times the floating registers were read
-system.cpu1.num_fp_register_writes 260 # number of times the floating registers were written
-system.cpu1.num_cc_register_reads 76091406 # number of times the CC registers were read
-system.cpu1.num_cc_register_writes 7577340 # number of times the CC registers were written
-system.cpu1.num_mem_refs 6800165 # number of memory refs
-system.cpu1.num_load_insts 3918117 # Number of load instructions
-system.cpu1.num_store_insts 2882048 # Number of store instructions
-system.cpu1.num_idle_cycles 136636530.804008 # Number of idle cycles
-system.cpu1.num_busy_cycles 7373372.195992 # Number of busy cycles
-system.cpu1.not_idle_fraction 0.051200 # Percentage of non-idle cycles
-system.cpu1.idle_fraction 0.948800 # Percentage of idle cycles
-system.cpu1.Branches 4337141 # Number of branches fetched
-system.cpu1.op_class::No_OpClass 23 0.00% 0.00% # Class of executed instruction
-system.cpu1.op_class::IntAlu 14685999 68.30% 68.30% # Class of executed instruction
-system.cpu1.op_class::IntMult 16352 0.08% 68.37% # Class of executed instruction
-system.cpu1.op_class::IntDiv 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::FloatAdd 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::FloatCmp 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::FloatCvt 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::FloatMult 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::FloatDiv 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::FloatSqrt 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdAdd 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdAddAcc 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdAlu 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdCmp 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdCvt 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdMisc 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdMult 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdMultAcc 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdShift 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdShiftAcc 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdSqrt 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdFloatAdd 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdFloatAlu 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdFloatCmp 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdFloatCvt 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdFloatDiv 0 0.00% 68.37% # Class of executed instruction
-system.cpu1.op_class::SimdFloatMisc 955 0.00% 68.38% # Class of executed instruction
-system.cpu1.op_class::SimdFloatMult 0 0.00% 68.38% # Class of executed instruction
-system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 68.38% # Class of executed instruction
-system.cpu1.op_class::SimdFloatSqrt 0 0.00% 68.38% # Class of executed instruction
-system.cpu1.op_class::MemRead 3918117 18.22% 86.60% # Class of executed instruction
-system.cpu1.op_class::MemWrite 2882048 13.40% 100.00% # Class of executed instruction
+system.cpu1.committedInsts 17268414 # Number of instructions committed
+system.cpu1.committedOps 20827213 # Number of ops (including micro ops) committed
+system.cpu1.num_int_alu_accesses 18584422 # Number of integer alu accesses
+system.cpu1.num_fp_alu_accesses 1582 # Number of float alu accesses
+system.cpu1.num_func_calls 1992181 # number of times a function call or return occured
+system.cpu1.num_conditional_control_insts 2177842 # number of instructions that are conditional controls
+system.cpu1.num_int_insts 18584422 # number of integer instructions
+system.cpu1.num_fp_insts 1582 # number of float instructions
+system.cpu1.num_int_register_reads 34435383 # number of times the integer registers were read
+system.cpu1.num_int_register_writes 13029372 # number of times the integer registers were written
+system.cpu1.num_fp_register_reads 1129 # number of times the floating registers were read
+system.cpu1.num_fp_register_writes 454 # number of times the floating registers were written
+system.cpu1.num_cc_register_reads 75826477 # number of times the CC registers were read
+system.cpu1.num_cc_register_writes 7417953 # number of times the CC registers were written
+system.cpu1.num_mem_refs 6811480 # number of memory refs
+system.cpu1.num_load_insts 3856412 # Number of load instructions
+system.cpu1.num_store_insts 2955068 # Number of store instructions
+system.cpu1.num_idle_cycles 136802879.005961 # Number of idle cycles
+system.cpu1.num_busy_cycles 6994486.994039 # Number of busy cycles
+system.cpu1.not_idle_fraction 0.048641 # Percentage of non-idle cycles
+system.cpu1.idle_fraction 0.951359 # Percentage of idle cycles
+system.cpu1.Branches 4283216 # Number of branches fetched
+system.cpu1.op_class::No_OpClass 49 0.00% 0.00% # Class of executed instruction
+system.cpu1.op_class::IntAlu 14611363 68.15% 68.15% # Class of executed instruction
+system.cpu1.op_class::IntMult 16029 0.07% 68.23% # Class of executed instruction
+system.cpu1.op_class::IntDiv 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::FloatAdd 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::FloatCmp 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::FloatCvt 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::FloatMult 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::FloatDiv 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::FloatSqrt 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdAdd 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdAddAcc 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdAlu 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdCmp 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdCvt 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdMisc 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdMult 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdMultAcc 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdShift 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdShiftAcc 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdSqrt 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdFloatAdd 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdFloatAlu 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdFloatCmp 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdFloatCvt 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdFloatDiv 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdFloatMisc 979 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdFloatMult 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::SimdFloatSqrt 0 0.00% 68.23% # Class of executed instruction
+system.cpu1.op_class::MemRead 3856412 17.99% 86.22% # Class of executed instruction
+system.cpu1.op_class::MemWrite 2955068 13.78% 100.00% # Class of executed instruction
system.cpu1.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
-system.cpu1.op_class::total 21503494 # Class of executed instruction
-system.cpu2.branchPred.lookups 5770264 # Number of BP lookups
-system.cpu2.branchPred.condPredicted 2970192 # Number of conditional branches predicted
-system.cpu2.branchPred.condIncorrect 504477 # Number of conditional branches incorrect
-system.cpu2.branchPred.BTBLookups 3340147 # Number of BTB lookups
-system.cpu2.branchPred.BTBHits 1745677 # Number of BTB hits
+system.cpu1.op_class::total 21439900 # Class of executed instruction
+system.cpu2.branchPred.lookups 5566129 # Number of BP lookups
+system.cpu2.branchPred.condPredicted 2825980 # Number of conditional branches predicted
+system.cpu2.branchPred.condIncorrect 493463 # Number of conditional branches incorrect
+system.cpu2.branchPred.BTBLookups 3182486 # Number of BTB lookups
+system.cpu2.branchPred.BTBHits 1660276 # Number of BTB hits
system.cpu2.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-system.cpu2.branchPred.BTBHitPct 52.263478 # BTB Hit Percentage
-system.cpu2.branchPred.usedRAS 1611184 # Number of times the RAS was used to get a target.
-system.cpu2.branchPred.RASInCorrect 331954 # Number of incorrect RAS predictions.
-system.cpu2.branchPred.indirectLookups 670735 # Number of indirect predictor lookups.
-system.cpu2.branchPred.indirectHits 637081 # Number of indirect target hits.
-system.cpu2.branchPred.indirectMisses 33654 # Number of indirect misses.
-system.cpu2.branchPredindirectMispredicted 21230 # Number of mispredicted indirect branches.
+system.cpu2.branchPred.BTBHitPct 52.169153 # BTB Hit Percentage
+system.cpu2.branchPred.usedRAS 1582499 # Number of times the RAS was used to get a target.
+system.cpu2.branchPred.RASInCorrect 327011 # Number of incorrect RAS predictions.
+system.cpu2.branchPred.indirectLookups 671898 # Number of indirect predictor lookups.
+system.cpu2.branchPred.indirectHits 638941 # Number of indirect target hits.
+system.cpu2.branchPred.indirectMisses 32957 # Number of indirect misses.
+system.cpu2.branchPredindirectMispredicted 21982 # Number of mispredicted indirect branches.
system.cpu2.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
system.cpu2.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu2.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
@@ -1366,60 +1383,57 @@ system.cpu2.dstage2_mmu.stage2_tlb.inst_accesses 0
system.cpu2.dstage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu2.dstage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu2.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses
-system.cpu2.dtb.walker.walks 12712 # Table walker walks requested
-system.cpu2.dtb.walker.walksShort 12712 # Table walker walks initiated with short descriptors
-system.cpu2.dtb.walker.walksShortTerminationLevel::Level1 8004 # Level at which table walker walks with short descriptors terminate
-system.cpu2.dtb.walker.walksShortTerminationLevel::Level2 4708 # Level at which table walker walks with short descriptors terminate
-system.cpu2.dtb.walker.walkWaitTime::samples 12712 # Table walker wait (enqueue to first request) latency
-system.cpu2.dtb.walker.walkWaitTime::0 12712 100.00% 100.00% # Table walker wait (enqueue to first request) latency
-system.cpu2.dtb.walker.walkWaitTime::total 12712 # Table walker wait (enqueue to first request) latency
-system.cpu2.dtb.walker.walkCompletionTime::samples 2182 # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::mean 12059.578368 # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::gmean 10400.362655 # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::stdev 6359.555797 # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::2048-4095 13 0.60% 0.60% # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::4096-6143 665 30.48% 31.07% # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::6144-8191 1 0.05% 31.12% # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::10240-12287 773 35.43% 66.54% # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::12288-14335 182 8.34% 74.89% # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::14336-16383 171 7.84% 82.72% # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::22528-24575 366 16.77% 99.50% # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::24576-26623 11 0.50% 100.00% # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walkCompletionTime::total 2182 # Table walker service (enqueue to completion) latency
-system.cpu2.dtb.walker.walksPending::samples 2000052000 # Table walker pending requests distribution
-system.cpu2.dtb.walker.walksPending::0 2000052000 100.00% 100.00% # Table walker pending requests distribution
-system.cpu2.dtb.walker.walksPending::total 2000052000 # Table walker pending requests distribution
-system.cpu2.dtb.walker.walkPageSizes::4K 1365 62.56% 62.56% # Table walker page sizes translated
-system.cpu2.dtb.walker.walkPageSizes::1M 817 37.44% 100.00% # Table walker page sizes translated
-system.cpu2.dtb.walker.walkPageSizes::total 2182 # Table walker page sizes translated
-system.cpu2.dtb.walker.walkRequestOrigin_Requested::Data 12712 # Table walker requests started/completed, data/inst
+system.cpu2.dtb.walker.walks 11822 # Table walker walks requested
+system.cpu2.dtb.walker.walksShort 11822 # Table walker walks initiated with short descriptors
+system.cpu2.dtb.walker.walksShortTerminationLevel::Level1 7337 # Level at which table walker walks with short descriptors terminate
+system.cpu2.dtb.walker.walksShortTerminationLevel::Level2 4485 # Level at which table walker walks with short descriptors terminate
+system.cpu2.dtb.walker.walkWaitTime::samples 11822 # Table walker wait (enqueue to first request) latency
+system.cpu2.dtb.walker.walkWaitTime::0 11822 100.00% 100.00% # Table walker wait (enqueue to first request) latency
+system.cpu2.dtb.walker.walkWaitTime::total 11822 # Table walker wait (enqueue to first request) latency
+system.cpu2.dtb.walker.walkCompletionTime::samples 2048 # Table walker service (enqueue to completion) latency
+system.cpu2.dtb.walker.walkCompletionTime::mean 12710.205078 # Table walker service (enqueue to completion) latency
+system.cpu2.dtb.walker.walkCompletionTime::gmean 10939.246339 # Table walker service (enqueue to completion) latency
+system.cpu2.dtb.walker.walkCompletionTime::stdev 6922.657260 # Table walker service (enqueue to completion) latency
+system.cpu2.dtb.walker.walkCompletionTime::0-8191 574 28.03% 28.03% # Table walker service (enqueue to completion) latency
+system.cpu2.dtb.walker.walkCompletionTime::8192-16383 1046 51.07% 79.10% # Table walker service (enqueue to completion) latency
+system.cpu2.dtb.walker.walkCompletionTime::16384-24575 414 20.21% 99.32% # Table walker service (enqueue to completion) latency
+system.cpu2.dtb.walker.walkCompletionTime::24576-32767 12 0.59% 99.90% # Table walker service (enqueue to completion) latency
+system.cpu2.dtb.walker.walkCompletionTime::81920-90111 2 0.10% 100.00% # Table walker service (enqueue to completion) latency
+system.cpu2.dtb.walker.walkCompletionTime::total 2048 # Table walker service (enqueue to completion) latency
+system.cpu2.dtb.walker.walksPending::samples 2000043000 # Table walker pending requests distribution
+system.cpu2.dtb.walker.walksPending::0 2000043000 100.00% 100.00% # Table walker pending requests distribution
+system.cpu2.dtb.walker.walksPending::total 2000043000 # Table walker pending requests distribution
+system.cpu2.dtb.walker.walkPageSizes::4K 1270 62.01% 62.01% # Table walker page sizes translated
+system.cpu2.dtb.walker.walkPageSizes::1M 778 37.99% 100.00% # Table walker page sizes translated
+system.cpu2.dtb.walker.walkPageSizes::total 2048 # Table walker page sizes translated
+system.cpu2.dtb.walker.walkRequestOrigin_Requested::Data 11822 # Table walker requests started/completed, data/inst
system.cpu2.dtb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
-system.cpu2.dtb.walker.walkRequestOrigin_Requested::total 12712 # Table walker requests started/completed, data/inst
-system.cpu2.dtb.walker.walkRequestOrigin_Completed::Data 2182 # Table walker requests started/completed, data/inst
+system.cpu2.dtb.walker.walkRequestOrigin_Requested::total 11822 # Table walker requests started/completed, data/inst
+system.cpu2.dtb.walker.walkRequestOrigin_Completed::Data 2048 # Table walker requests started/completed, data/inst
system.cpu2.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
-system.cpu2.dtb.walker.walkRequestOrigin_Completed::total 2182 # Table walker requests started/completed, data/inst
-system.cpu2.dtb.walker.walkRequestOrigin::total 14894 # Table walker requests started/completed, data/inst
+system.cpu2.dtb.walker.walkRequestOrigin_Completed::total 2048 # Table walker requests started/completed, data/inst
+system.cpu2.dtb.walker.walkRequestOrigin::total 13870 # Table walker requests started/completed, data/inst
system.cpu2.dtb.inst_hits 0 # ITB inst hits
system.cpu2.dtb.inst_misses 0 # ITB inst misses
-system.cpu2.dtb.read_hits 4621518 # DTB read hits
-system.cpu2.dtb.read_misses 11435 # DTB read misses
-system.cpu2.dtb.write_hits 3537262 # DTB write hits
-system.cpu2.dtb.write_misses 1277 # DTB write misses
-system.cpu2.dtb.flush_tlb 153 # Number of times complete TLB was flushed
-system.cpu2.dtb.flush_tlb_mva 162 # Number of times TLB was flushed by MVA
+system.cpu2.dtb.read_hits 4336552 # DTB read hits
+system.cpu2.dtb.read_misses 10662 # DTB read misses
+system.cpu2.dtb.write_hits 3355101 # DTB write hits
+system.cpu2.dtb.write_misses 1160 # DTB write misses
+system.cpu2.dtb.flush_tlb 152 # Number of times complete TLB was flushed
+system.cpu2.dtb.flush_tlb_mva 151 # Number of times TLB was flushed by MVA
system.cpu2.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu2.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
-system.cpu2.dtb.flush_entries 1476 # Number of entries that have been flushed from TLB
-system.cpu2.dtb.align_faults 227 # Number of TLB faults due to alignment restrictions
-system.cpu2.dtb.prefetch_faults 324 # Number of TLB faults due to prefetch
+system.cpu2.dtb.flush_entries 1478 # Number of entries that have been flushed from TLB
+system.cpu2.dtb.align_faults 270 # Number of TLB faults due to alignment restrictions
+system.cpu2.dtb.prefetch_faults 314 # Number of TLB faults due to prefetch
system.cpu2.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions
-system.cpu2.dtb.perms_faults 121 # Number of TLB faults due to permissions restrictions
-system.cpu2.dtb.read_accesses 4632953 # DTB read accesses
-system.cpu2.dtb.write_accesses 3538539 # DTB write accesses
+system.cpu2.dtb.perms_faults 127 # Number of TLB faults due to permissions restrictions
+system.cpu2.dtb.read_accesses 4347214 # DTB read accesses
+system.cpu2.dtb.write_accesses 3356261 # DTB write accesses
system.cpu2.dtb.inst_accesses 0 # ITB inst accesses
-system.cpu2.dtb.hits 8158780 # DTB hits
-system.cpu2.dtb.misses 12712 # DTB misses
-system.cpu2.dtb.accesses 8171492 # DTB accesses
+system.cpu2.dtb.hits 7691653 # DTB hits
+system.cpu2.dtb.misses 11822 # DTB misses
+system.cpu2.dtb.accesses 7703475 # DTB accesses
system.cpu2.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
system.cpu2.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu2.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
@@ -1449,122 +1463,120 @@ system.cpu2.istage2_mmu.stage2_tlb.inst_accesses 0
system.cpu2.istage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu2.istage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu2.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses
-system.cpu2.itb.walker.walks 1416 # Table walker walks requested
-system.cpu2.itb.walker.walksShort 1416 # Table walker walks initiated with short descriptors
-system.cpu2.itb.walker.walksShortTerminationLevel::Level1 256 # Level at which table walker walks with short descriptors terminate
-system.cpu2.itb.walker.walksShortTerminationLevel::Level2 1160 # Level at which table walker walks with short descriptors terminate
-system.cpu2.itb.walker.walkWaitTime::samples 1416 # Table walker wait (enqueue to first request) latency
-system.cpu2.itb.walker.walkWaitTime::0 1416 100.00% 100.00% # Table walker wait (enqueue to first request) latency
-system.cpu2.itb.walker.walkWaitTime::total 1416 # Table walker wait (enqueue to first request) latency
-system.cpu2.itb.walker.walkCompletionTime::samples 870 # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::mean 12294.252874 # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::gmean 10677.468386 # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::stdev 6303.110021 # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::4096-6143 282 32.41% 32.41% # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::6144-8191 1 0.11% 32.53% # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::10240-12287 251 28.85% 61.38% # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::12288-14335 36 4.14% 65.52% # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::14336-16383 152 17.47% 82.99% # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::16384-18431 1 0.11% 83.10% # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::22528-24575 145 16.67% 99.77% # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::24576-26623 2 0.23% 100.00% # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walkCompletionTime::total 870 # Table walker service (enqueue to completion) latency
-system.cpu2.itb.walker.walksPending::samples 2000037500 # Table walker pending requests distribution
-system.cpu2.itb.walker.walksPending::0 2000037500 100.00% 100.00% # Table walker pending requests distribution
-system.cpu2.itb.walker.walksPending::total 2000037500 # Table walker pending requests distribution
-system.cpu2.itb.walker.walkPageSizes::4K 614 70.57% 70.57% # Table walker page sizes translated
-system.cpu2.itb.walker.walkPageSizes::1M 256 29.43% 100.00% # Table walker page sizes translated
-system.cpu2.itb.walker.walkPageSizes::total 870 # Table walker page sizes translated
+system.cpu2.itb.walker.walks 1331 # Table walker walks requested
+system.cpu2.itb.walker.walksShort 1331 # Table walker walks initiated with short descriptors
+system.cpu2.itb.walker.walksShortTerminationLevel::Level1 253 # Level at which table walker walks with short descriptors terminate
+system.cpu2.itb.walker.walksShortTerminationLevel::Level2 1078 # Level at which table walker walks with short descriptors terminate
+system.cpu2.itb.walker.walkWaitTime::samples 1331 # Table walker wait (enqueue to first request) latency
+system.cpu2.itb.walker.walkWaitTime::0 1331 100.00% 100.00% # Table walker wait (enqueue to first request) latency
+system.cpu2.itb.walker.walkWaitTime::total 1331 # Table walker wait (enqueue to first request) latency
+system.cpu2.itb.walker.walkCompletionTime::samples 850 # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walkCompletionTime::mean 12864.705882 # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walkCompletionTime::gmean 11157.048638 # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walkCompletionTime::stdev 6541.427390 # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walkCompletionTime::4096-6143 256 30.12% 30.12% # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walkCompletionTime::10240-12287 237 27.88% 58.00% # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walkCompletionTime::12288-14335 63 7.41% 65.41% # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walkCompletionTime::14336-16383 116 13.65% 79.06% # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walkCompletionTime::22528-24575 176 20.71% 99.76% # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walkCompletionTime::24576-26623 2 0.24% 100.00% # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walkCompletionTime::total 850 # Table walker service (enqueue to completion) latency
+system.cpu2.itb.walker.walksPending::samples 2000028500 # Table walker pending requests distribution
+system.cpu2.itb.walker.walksPending::0 2000028500 100.00% 100.00% # Table walker pending requests distribution
+system.cpu2.itb.walker.walksPending::total 2000028500 # Table walker pending requests distribution
+system.cpu2.itb.walker.walkPageSizes::4K 607 71.41% 71.41% # Table walker page sizes translated
+system.cpu2.itb.walker.walkPageSizes::1M 243 28.59% 100.00% # Table walker page sizes translated
+system.cpu2.itb.walker.walkPageSizes::total 850 # Table walker page sizes translated
system.cpu2.itb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
-system.cpu2.itb.walker.walkRequestOrigin_Requested::Inst 1416 # Table walker requests started/completed, data/inst
-system.cpu2.itb.walker.walkRequestOrigin_Requested::total 1416 # Table walker requests started/completed, data/inst
+system.cpu2.itb.walker.walkRequestOrigin_Requested::Inst 1331 # Table walker requests started/completed, data/inst
+system.cpu2.itb.walker.walkRequestOrigin_Requested::total 1331 # Table walker requests started/completed, data/inst
system.cpu2.itb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
-system.cpu2.itb.walker.walkRequestOrigin_Completed::Inst 870 # Table walker requests started/completed, data/inst
-system.cpu2.itb.walker.walkRequestOrigin_Completed::total 870 # Table walker requests started/completed, data/inst
-system.cpu2.itb.walker.walkRequestOrigin::total 2286 # Table walker requests started/completed, data/inst
-system.cpu2.itb.inst_hits 10823576 # ITB inst hits
-system.cpu2.itb.inst_misses 1416 # ITB inst misses
+system.cpu2.itb.walker.walkRequestOrigin_Completed::Inst 850 # Table walker requests started/completed, data/inst
+system.cpu2.itb.walker.walkRequestOrigin_Completed::total 850 # Table walker requests started/completed, data/inst
+system.cpu2.itb.walker.walkRequestOrigin::total 2181 # Table walker requests started/completed, data/inst
+system.cpu2.itb.inst_hits 10452986 # ITB inst hits
+system.cpu2.itb.inst_misses 1331 # ITB inst misses
system.cpu2.itb.read_hits 0 # DTB read hits
system.cpu2.itb.read_misses 0 # DTB read misses
system.cpu2.itb.write_hits 0 # DTB write hits
system.cpu2.itb.write_misses 0 # DTB write misses
-system.cpu2.itb.flush_tlb 153 # Number of times complete TLB was flushed
-system.cpu2.itb.flush_tlb_mva 162 # Number of times TLB was flushed by MVA
+system.cpu2.itb.flush_tlb 152 # Number of times complete TLB was flushed
+system.cpu2.itb.flush_tlb_mva 151 # Number of times TLB was flushed by MVA
system.cpu2.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu2.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
-system.cpu2.itb.flush_entries 879 # Number of entries that have been flushed from TLB
+system.cpu2.itb.flush_entries 885 # Number of entries that have been flushed from TLB
system.cpu2.itb.align_faults 0 # Number of TLB faults due to alignment restrictions
system.cpu2.itb.prefetch_faults 0 # Number of TLB faults due to prefetch
system.cpu2.itb.domain_faults 0 # Number of TLB faults due to domain restrictions
-system.cpu2.itb.perms_faults 1762 # Number of TLB faults due to permissions restrictions
+system.cpu2.itb.perms_faults 1709 # Number of TLB faults due to permissions restrictions
system.cpu2.itb.read_accesses 0 # DTB read accesses
system.cpu2.itb.write_accesses 0 # DTB write accesses
-system.cpu2.itb.inst_accesses 10824992 # ITB inst accesses
-system.cpu2.itb.hits 10823576 # DTB hits
-system.cpu2.itb.misses 1416 # DTB misses
-system.cpu2.itb.accesses 10824992 # DTB accesses
-system.cpu2.numCycles 1395003781 # number of cpu cycles simulated
+system.cpu2.itb.inst_accesses 10454317 # ITB inst accesses
+system.cpu2.itb.hits 10452986 # DTB hits
+system.cpu2.itb.misses 1331 # DTB misses
+system.cpu2.itb.accesses 10454317 # DTB accesses
+system.cpu2.numCycles 141973763 # number of cpu cycles simulated
system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu2.committedInsts 20361751 # Number of instructions committed
-system.cpu2.committedOps 24653563 # Number of ops (including micro ops) committed
-system.cpu2.discardedOps 1458677 # Number of ops (including micro ops) which were discarded before commit
-system.cpu2.numFetchSuspends 555 # Number of times Execute suspended instruction fetching
-system.cpu2.quiesceCycles 4254696736 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt
-system.cpu2.cpi 68.510993 # CPI: cycles per instruction
-system.cpu2.ipc 0.014596 # IPC: instructions per cycle
-system.cpu2.op_class_0::No_OpClass 53 0.00% 0.00% # Class of committed instruction
-system.cpu2.op_class_0::IntAlu 16404326 66.54% 66.54% # Class of committed instruction
-system.cpu2.op_class_0::IntMult 20837 0.08% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::IntDiv 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::FloatAdd 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::FloatCmp 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::FloatCvt 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::FloatMult 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::FloatDiv 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::FloatSqrt 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdAdd 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdAddAcc 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdAlu 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdCmp 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdCvt 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdMisc 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdMult 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdMultAcc 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdShift 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdShiftAcc 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdSqrt 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdFloatAdd 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdFloatAlu 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdFloatCmp 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdFloatCvt 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdFloatDiv 0 0.00% 66.62% # Class of committed instruction
-system.cpu2.op_class_0::SimdFloatMisc 1376 0.01% 66.63% # Class of committed instruction
-system.cpu2.op_class_0::SimdFloatMult 0 0.00% 66.63% # Class of committed instruction
-system.cpu2.op_class_0::SimdFloatMultAcc 0 0.00% 66.63% # Class of committed instruction
-system.cpu2.op_class_0::SimdFloatSqrt 0 0.00% 66.63% # Class of committed instruction
-system.cpu2.op_class_0::MemRead 4532751 18.39% 85.02% # Class of committed instruction
-system.cpu2.op_class_0::MemWrite 3694220 14.98% 100.00% # Class of committed instruction
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+system.cpu2.committedOps 23288496 # Number of ops (including micro ops) committed
+system.cpu2.discardedOps 1385563 # Number of ops (including micro ops) which were discarded before commit
+system.cpu2.numFetchSuspends 546 # Number of times Execute suspended instruction fetching
+system.cpu2.quiesceCycles 36865 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt
+system.cpu2.cpi 7.391628 # CPI: cycles per instruction
+system.cpu2.ipc 0.135288 # IPC: instructions per cycle
+system.cpu2.op_class_0::No_OpClass 48 0.00% 0.00% # Class of committed instruction
+system.cpu2.op_class_0::IntAlu 15543125 66.74% 66.74% # Class of committed instruction
+system.cpu2.op_class_0::IntMult 18693 0.08% 66.82% # Class of committed instruction
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+system.cpu2.op_class_0::FloatAdd 0 0.00% 66.82% # Class of committed instruction
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+system.cpu2.op_class_0::FloatCvt 0 0.00% 66.82% # Class of committed instruction
+system.cpu2.op_class_0::FloatMult 0 0.00% 66.82% # Class of committed instruction
+system.cpu2.op_class_0::FloatDiv 0 0.00% 66.82% # Class of committed instruction
+system.cpu2.op_class_0::FloatSqrt 0 0.00% 66.82% # Class of committed instruction
+system.cpu2.op_class_0::SimdAdd 0 0.00% 66.82% # Class of committed instruction
+system.cpu2.op_class_0::SimdAddAcc 0 0.00% 66.82% # Class of committed instruction
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+system.cpu2.op_class_0::SimdMultAcc 0 0.00% 66.82% # Class of committed instruction
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+system.cpu2.op_class_0::SimdShiftAcc 0 0.00% 66.82% # Class of committed instruction
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+system.cpu2.op_class_0::SimdFloatAdd 0 0.00% 66.82% # Class of committed instruction
+system.cpu2.op_class_0::SimdFloatAlu 0 0.00% 66.82% # Class of committed instruction
+system.cpu2.op_class_0::SimdFloatCmp 0 0.00% 66.82% # Class of committed instruction
+system.cpu2.op_class_0::SimdFloatCvt 0 0.00% 66.82% # Class of committed instruction
+system.cpu2.op_class_0::SimdFloatDiv 0 0.00% 66.82% # Class of committed instruction
+system.cpu2.op_class_0::SimdFloatMisc 1356 0.01% 66.83% # Class of committed instruction
+system.cpu2.op_class_0::SimdFloatMult 0 0.00% 66.83% # Class of committed instruction
+system.cpu2.op_class_0::SimdFloatMultAcc 0 0.00% 66.83% # Class of committed instruction
+system.cpu2.op_class_0::SimdFloatSqrt 0 0.00% 66.83% # Class of committed instruction
+system.cpu2.op_class_0::MemRead 4252165 18.26% 85.09% # Class of committed instruction
+system.cpu2.op_class_0::MemWrite 3473109 14.91% 100.00% # Class of committed instruction
system.cpu2.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu2.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
-system.cpu2.op_class_0::total 24653563 # Class of committed instruction
+system.cpu2.op_class_0::total 23288496 # Class of committed instruction
system.cpu2.kern.inst.arm 0 # number of arm instructions executed
system.cpu2.kern.inst.quiesce 0 # number of quiesce instructions executed
-system.cpu2.tickCycles 42378126 # Number of cycles that the object actually ticked
-system.cpu2.idleCycles 1352625655 # Total number of cycles that the object has spent stopped
-system.cpu3.branchPred.lookups 13252062 # Number of BP lookups
-system.cpu3.branchPred.condPredicted 7208218 # Number of conditional branches predicted
-system.cpu3.branchPred.condIncorrect 300007 # Number of conditional branches incorrect
-system.cpu3.branchPred.BTBLookups 8273793 # Number of BTB lookups
-system.cpu3.branchPred.BTBHits 4241536 # Number of BTB hits
+system.cpu2.tickCycles 41357618 # Number of cycles that the object actually ticked
+system.cpu2.idleCycles 100616145 # Total number of cycles that the object has spent stopped
+system.cpu3.branchPred.lookups 13553669 # Number of BP lookups
+system.cpu3.branchPred.condPredicted 7461566 # Number of conditional branches predicted
+system.cpu3.branchPred.condIncorrect 296736 # Number of conditional branches incorrect
+system.cpu3.branchPred.BTBLookups 8400668 # Number of BTB lookups
+system.cpu3.branchPred.BTBHits 4438644 # Number of BTB hits
system.cpu3.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-system.cpu3.branchPred.BTBHitPct 51.264710 # BTB Hit Percentage
-system.cpu3.branchPred.usedRAS 3096631 # Number of times the RAS was used to get a target.
-system.cpu3.branchPred.RASInCorrect 16788 # Number of incorrect RAS predictions.
-system.cpu3.branchPred.indirectLookups 2038250 # Number of indirect predictor lookups.
-system.cpu3.branchPred.indirectHits 1978281 # Number of indirect target hits.
-system.cpu3.branchPred.indirectMisses 59969 # Number of indirect misses.
-system.cpu3.branchPredindirectMispredicted 18256 # Number of mispredicted indirect branches.
+system.cpu3.branchPred.BTBHitPct 52.836798 # BTB Hit Percentage
+system.cpu3.branchPred.usedRAS 3086842 # Number of times the RAS was used to get a target.
+system.cpu3.branchPred.RASInCorrect 16263 # Number of incorrect RAS predictions.
+system.cpu3.branchPred.indirectLookups 2014355 # Number of indirect predictor lookups.
+system.cpu3.branchPred.indirectHits 1952666 # Number of indirect target hits.
+system.cpu3.branchPred.indirectMisses 61689 # Number of indirect misses.
+system.cpu3.branchPredindirectMispredicted 18072 # Number of mispredicted indirect branches.
system.cpu3.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
system.cpu3.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu3.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
@@ -1594,84 +1606,89 @@ system.cpu3.dstage2_mmu.stage2_tlb.inst_accesses 0
system.cpu3.dstage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu3.dstage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu3.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses
-system.cpu3.dtb.walker.walks 33989 # Table walker walks requested
-system.cpu3.dtb.walker.walksShort 33989 # Table walker walks initiated with short descriptors
-system.cpu3.dtb.walker.walksShortTerminationLevel::Level1 11190 # Level at which table walker walks with short descriptors terminate
-system.cpu3.dtb.walker.walksShortTerminationLevel::Level2 8109 # Level at which table walker walks with short descriptors terminate
-system.cpu3.dtb.walker.walksSquashedBefore 14690 # Table walks squashed before starting
-system.cpu3.dtb.walker.walkWaitTime::samples 19299 # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::mean 517.177056 # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::stdev 3689.691447 # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::0-16383 19111 99.03% 99.03% # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::16384-32767 146 0.76% 99.78% # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::32768-49151 30 0.16% 99.94% # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::49152-65535 4 0.02% 99.96% # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::65536-81919 3 0.02% 99.97% # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::81920-98303 2 0.01% 99.98% # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::98304-114687 1 0.01% 99.99% # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::114688-131071 1 0.01% 99.99% # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::147456-163839 1 0.01% 100.00% # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkWaitTime::total 19299 # Table walker wait (enqueue to first request) latency
-system.cpu3.dtb.walker.walkCompletionTime::samples 6381 # Table walker service (enqueue to completion) latency
-system.cpu3.dtb.walker.walkCompletionTime::mean 13105.939508 # Table walker service (enqueue to completion) latency
-system.cpu3.dtb.walker.walkCompletionTime::gmean 10791.784480 # Table walker service (enqueue to completion) latency
-system.cpu3.dtb.walker.walkCompletionTime::stdev 9136.863267 # Table walker service (enqueue to completion) latency
-system.cpu3.dtb.walker.walkCompletionTime::0-32767 6254 98.01% 98.01% # Table walker service (enqueue to completion) latency
-system.cpu3.dtb.walker.walkCompletionTime::32768-65535 124 1.94% 99.95% # Table walker service (enqueue to completion) latency
-system.cpu3.dtb.walker.walkCompletionTime::65536-98303 1 0.02% 99.97% # Table walker service (enqueue to completion) latency
-system.cpu3.dtb.walker.walkCompletionTime::131072-163839 1 0.02% 99.98% # Table walker service (enqueue to completion) latency
-system.cpu3.dtb.walker.walkCompletionTime::360448-393215 1 0.02% 100.00% # Table walker service (enqueue to completion) latency
-system.cpu3.dtb.walker.walkCompletionTime::total 6381 # Table walker service (enqueue to completion) latency
-system.cpu3.dtb.walker.walksPending::samples -8047359064 # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::mean 0.134723 # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::0-1 -8096058564 100.61% 100.61% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::2-3 33943000 -0.42% 100.18% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::4-5 7702500 -0.10% 100.09% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::6-7 2846000 -0.04% 100.05% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::8-9 1530000 -0.02% 100.03% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::10-11 743500 -0.01% 100.02% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::12-13 398000 -0.00% 100.02% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::14-15 810000 -0.01% 100.01% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::16-17 216000 -0.00% 100.01% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::18-19 164500 -0.00% 100.00% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::20-21 85000 -0.00% 100.00% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::22-23 84500 -0.00% 100.00% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::24-25 64500 -0.00% 100.00% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::26-27 35000 -0.00% 100.00% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::28-29 17500 -0.00% 100.00% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::30-31 59500 -0.00% 100.00% # Table walker pending requests distribution
-system.cpu3.dtb.walker.walksPending::total -8047359064 # Table walker pending requests distribution
-system.cpu3.dtb.walker.walkPageSizes::4K 1874 70.21% 70.21% # Table walker page sizes translated
-system.cpu3.dtb.walker.walkPageSizes::1M 795 29.79% 100.00% # Table walker page sizes translated
-system.cpu3.dtb.walker.walkPageSizes::total 2669 # Table walker page sizes translated
-system.cpu3.dtb.walker.walkRequestOrigin_Requested::Data 33989 # Table walker requests started/completed, data/inst
+system.cpu3.dtb.walker.walks 34281 # Table walker walks requested
+system.cpu3.dtb.walker.walksShort 34281 # Table walker walks initiated with short descriptors
+system.cpu3.dtb.walker.walksShortTerminationLevel::Level1 10962 # Level at which table walker walks with short descriptors terminate
+system.cpu3.dtb.walker.walksShortTerminationLevel::Level2 8120 # Level at which table walker walks with short descriptors terminate
+system.cpu3.dtb.walker.walksSquashedBefore 15199 # Table walks squashed before starting
+system.cpu3.dtb.walker.walkWaitTime::samples 19082 # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::mean 497.143905 # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::stdev 3025.740716 # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::0-8191 18625 97.61% 97.61% # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::8192-16383 304 1.59% 99.20% # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::16384-24575 96 0.50% 99.70% # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::24576-32767 29 0.15% 99.85% # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::32768-40959 9 0.05% 99.90% # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::40960-49151 16 0.08% 99.98% # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::49152-57343 2 0.01% 99.99% # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::65536-73727 1 0.01% 100.00% # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkWaitTime::total 19082 # Table walker wait (enqueue to first request) latency
+system.cpu3.dtb.walker.walkCompletionTime::samples 6403 # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::mean 11721.380603 # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::gmean 9562.982056 # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::stdev 7657.065586 # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::0-8191 2445 38.19% 38.19% # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::8192-16383 2784 43.48% 81.66% # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::16384-24575 982 15.34% 97.00% # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::24576-32767 97 1.51% 98.52% # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::32768-40959 43 0.67% 99.19% # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::40960-49151 36 0.56% 99.75% # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::49152-57343 11 0.17% 99.92% # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::57344-65535 1 0.02% 99.94% # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::65536-73727 1 0.02% 99.95% # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::81920-90111 3 0.05% 100.00% # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walkCompletionTime::total 6403 # Table walker service (enqueue to completion) latency
+system.cpu3.dtb.walker.walksPending::samples -8551346564 # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::mean 0.449587 # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::stdev 0.363024 # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::0-1 -8598250064 100.55% 100.55% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::2-3 33569000 -0.39% 100.16% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::4-5 6441000 -0.08% 100.08% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::6-7 2603000 -0.03% 100.05% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::8-9 1836000 -0.02% 100.03% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::10-11 609000 -0.01% 100.02% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::12-13 358000 -0.00% 100.02% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::14-15 901500 -0.01% 100.01% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::16-17 248500 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::18-19 75500 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::20-21 42000 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::22-23 21500 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::24-25 24500 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::26-27 20500 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::28-29 9000 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::30-31 144500 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.dtb.walker.walksPending::total -8551346564 # Table walker pending requests distribution
+system.cpu3.dtb.walker.walkPageSizes::4K 1841 71.89% 71.89% # Table walker page sizes translated
+system.cpu3.dtb.walker.walkPageSizes::1M 720 28.11% 100.00% # Table walker page sizes translated
+system.cpu3.dtb.walker.walkPageSizes::total 2561 # Table walker page sizes translated
+system.cpu3.dtb.walker.walkRequestOrigin_Requested::Data 34281 # Table walker requests started/completed, data/inst
system.cpu3.dtb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
-system.cpu3.dtb.walker.walkRequestOrigin_Requested::total 33989 # Table walker requests started/completed, data/inst
-system.cpu3.dtb.walker.walkRequestOrigin_Completed::Data 2669 # Table walker requests started/completed, data/inst
+system.cpu3.dtb.walker.walkRequestOrigin_Requested::total 34281 # Table walker requests started/completed, data/inst
+system.cpu3.dtb.walker.walkRequestOrigin_Completed::Data 2561 # Table walker requests started/completed, data/inst
system.cpu3.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
-system.cpu3.dtb.walker.walkRequestOrigin_Completed::total 2669 # Table walker requests started/completed, data/inst
-system.cpu3.dtb.walker.walkRequestOrigin::total 36658 # Table walker requests started/completed, data/inst
+system.cpu3.dtb.walker.walkRequestOrigin_Completed::total 2561 # Table walker requests started/completed, data/inst
+system.cpu3.dtb.walker.walkRequestOrigin::total 36842 # Table walker requests started/completed, data/inst
system.cpu3.dtb.inst_hits 0 # ITB inst hits
system.cpu3.dtb.inst_misses 0 # ITB inst misses
-system.cpu3.dtb.read_hits 7187448 # DTB read hits
-system.cpu3.dtb.read_misses 29423 # DTB read misses
-system.cpu3.dtb.write_hits 5346423 # DTB write hits
-system.cpu3.dtb.write_misses 4566 # DTB write misses
-system.cpu3.dtb.flush_tlb 162 # Number of times complete TLB was flushed
-system.cpu3.dtb.flush_tlb_mva 274 # Number of times TLB was flushed by MVA
+system.cpu3.dtb.read_hits 7461875 # DTB read hits
+system.cpu3.dtb.read_misses 28710 # DTB read misses
+system.cpu3.dtb.write_hits 5703324 # DTB write hits
+system.cpu3.dtb.write_misses 5571 # DTB write misses
+system.cpu3.dtb.flush_tlb 157 # Number of times complete TLB was flushed
+system.cpu3.dtb.flush_tlb_mva 225 # Number of times TLB was flushed by MVA
system.cpu3.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu3.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
-system.cpu3.dtb.flush_entries 1921 # Number of entries that have been flushed from TLB
-system.cpu3.dtb.align_faults 451 # Number of TLB faults due to alignment restrictions
-system.cpu3.dtb.prefetch_faults 735 # Number of TLB faults due to prefetch
+system.cpu3.dtb.flush_entries 1703 # Number of entries that have been flushed from TLB
+system.cpu3.dtb.align_faults 376 # Number of TLB faults due to alignment restrictions
+system.cpu3.dtb.prefetch_faults 690 # Number of TLB faults due to prefetch
system.cpu3.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions
-system.cpu3.dtb.perms_faults 408 # Number of TLB faults due to permissions restrictions
-system.cpu3.dtb.read_accesses 7216871 # DTB read accesses
-system.cpu3.dtb.write_accesses 5350989 # DTB write accesses
+system.cpu3.dtb.perms_faults 330 # Number of TLB faults due to permissions restrictions
+system.cpu3.dtb.read_accesses 7490585 # DTB read accesses
+system.cpu3.dtb.write_accesses 5708895 # DTB write accesses
system.cpu3.dtb.inst_accesses 0 # ITB inst accesses
-system.cpu3.dtb.hits 12533871 # DTB hits
-system.cpu3.dtb.misses 33989 # DTB misses
-system.cpu3.dtb.accesses 12567860 # DTB accesses
+system.cpu3.dtb.hits 13165199 # DTB hits
+system.cpu3.dtb.misses 34281 # DTB misses
+system.cpu3.dtb.accesses 13199480 # DTB accesses
system.cpu3.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
system.cpu3.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
system.cpu3.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
@@ -1701,388 +1718,383 @@ system.cpu3.istage2_mmu.stage2_tlb.inst_accesses 0
system.cpu3.istage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu3.istage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu3.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses
-system.cpu3.itb.walker.walks 4586 # Table walker walks requested
-system.cpu3.itb.walker.walksShort 4586 # Table walker walks initiated with short descriptors
-system.cpu3.itb.walker.walksShortTerminationLevel::Level1 1476 # Level at which table walker walks with short descriptors terminate
-system.cpu3.itb.walker.walksShortTerminationLevel::Level2 2630 # Level at which table walker walks with short descriptors terminate
-system.cpu3.itb.walker.walksSquashedBefore 480 # Table walks squashed before starting
-system.cpu3.itb.walker.walkWaitTime::samples 4106 # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::mean 1386.751096 # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::stdev 5919.935544 # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::0-8191 3869 94.23% 94.23% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::8192-16383 140 3.41% 97.64% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::16384-24575 51 1.24% 98.88% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::24576-32767 18 0.44% 99.32% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::32768-40959 9 0.22% 99.54% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::40960-49151 8 0.19% 99.73% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::49152-57343 3 0.07% 99.81% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::57344-65535 2 0.05% 99.85% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::65536-73727 1 0.02% 99.88% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::73728-81919 1 0.02% 99.90% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::81920-90111 2 0.05% 99.95% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::90112-98303 1 0.02% 99.98% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::106496-114687 1 0.02% 100.00% # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkWaitTime::total 4106 # Table walker wait (enqueue to first request) latency
-system.cpu3.itb.walker.walkCompletionTime::samples 1793 # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::mean 12167.875070 # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::gmean 9929.586957 # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::stdev 7490.636626 # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::0-4095 25 1.39% 1.39% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::4096-8191 685 38.20% 39.60% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::8192-12287 343 19.13% 58.73% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::12288-16383 337 18.80% 77.52% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::16384-20479 34 1.90% 79.42% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::20480-24575 327 18.24% 97.66% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::24576-28671 25 1.39% 99.05% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::28672-32767 2 0.11% 99.16% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::32768-36863 8 0.45% 99.61% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::36864-40959 3 0.17% 99.78% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::40960-45055 1 0.06% 99.83% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::45056-49151 1 0.06% 99.89% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::49152-53247 2 0.11% 100.00% # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walkCompletionTime::total 1793 # Table walker service (enqueue to completion) latency
-system.cpu3.itb.walker.walksPending::samples -8048628564 # Table walker pending requests distribution
-system.cpu3.itb.walker.walksPending::mean 0.273756 # Table walker pending requests distribution
-system.cpu3.itb.walker.walksPending::stdev 0.444979 # Table walker pending requests distribution
-system.cpu3.itb.walker.walksPending::0 -5842963052 72.60% 72.60% # Table walker pending requests distribution
-system.cpu3.itb.walker.walksPending::1 -2207299512 27.42% 100.02% # Table walker pending requests distribution
-system.cpu3.itb.walker.walksPending::2 1197000 -0.01% 100.01% # Table walker pending requests distribution
-system.cpu3.itb.walker.walksPending::3 240000 -0.00% 100.00% # Table walker pending requests distribution
-system.cpu3.itb.walker.walksPending::4 159500 -0.00% 100.00% # Table walker pending requests distribution
-system.cpu3.itb.walker.walksPending::5 37500 -0.00% 100.00% # Table walker pending requests distribution
-system.cpu3.itb.walker.walksPending::total -8048628564 # Table walker pending requests distribution
-system.cpu3.itb.walker.walkPageSizes::4K 959 73.04% 73.04% # Table walker page sizes translated
-system.cpu3.itb.walker.walkPageSizes::1M 354 26.96% 100.00% # Table walker page sizes translated
-system.cpu3.itb.walker.walkPageSizes::total 1313 # Table walker page sizes translated
+system.cpu3.itb.walker.walks 4255 # Table walker walks requested
+system.cpu3.itb.walker.walksShort 4255 # Table walker walks initiated with short descriptors
+system.cpu3.itb.walker.walksShortTerminationLevel::Level1 1348 # Level at which table walker walks with short descriptors terminate
+system.cpu3.itb.walker.walksShortTerminationLevel::Level2 2480 # Level at which table walker walks with short descriptors terminate
+system.cpu3.itb.walker.walksSquashedBefore 427 # Table walks squashed before starting
+system.cpu3.itb.walker.walkWaitTime::samples 3828 # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::mean 1433.646813 # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::stdev 5723.775049 # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::0-8191 3573 93.34% 93.34% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::8192-16383 172 4.49% 97.83% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::16384-24575 42 1.10% 98.93% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::24576-32767 19 0.50% 99.43% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::32768-40959 8 0.21% 99.63% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::40960-49151 2 0.05% 99.69% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::49152-57343 3 0.08% 99.76% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::57344-65535 3 0.08% 99.84% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::65536-73727 3 0.08% 99.92% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::73728-81919 1 0.03% 99.95% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::81920-90111 1 0.03% 99.97% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::98304-106495 1 0.03% 100.00% # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkWaitTime::total 3828 # Table walker wait (enqueue to first request) latency
+system.cpu3.itb.walker.walkCompletionTime::samples 1607 # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::mean 11553.827007 # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::gmean 9422.694802 # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::stdev 7714.919558 # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::0-8191 693 43.12% 43.12% # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::8192-16383 629 39.14% 82.27% # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::16384-24575 247 15.37% 97.64% # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::24576-32767 18 1.12% 98.76% # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::32768-40959 11 0.68% 99.44% # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::40960-49151 4 0.25% 99.69% # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::49152-57343 2 0.12% 99.81% # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::57344-65535 2 0.12% 99.94% # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::81920-90111 1 0.06% 100.00% # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walkCompletionTime::total 1607 # Table walker service (enqueue to completion) latency
+system.cpu3.itb.walker.walksPending::samples -8760206064 # Table walker pending requests distribution
+system.cpu3.itb.walker.walksPending::mean 0.998053 # Table walker pending requests distribution
+system.cpu3.itb.walker.walksPending::stdev 0.036484 # Table walker pending requests distribution
+system.cpu3.itb.walker.walksPending::0 -15003296 0.17% 0.17% # Table walker pending requests distribution
+system.cpu3.itb.walker.walksPending::1 -8746780268 99.85% 100.02% # Table walker pending requests distribution
+system.cpu3.itb.walker.walksPending::2 1238500 -0.01% 100.00% # Table walker pending requests distribution
+system.cpu3.itb.walker.walksPending::3 234500 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.itb.walker.walksPending::4 77000 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.itb.walker.walksPending::5 27500 -0.00% 100.00% # Table walker pending requests distribution
+system.cpu3.itb.walker.walksPending::total -8760206064 # Table walker pending requests distribution
+system.cpu3.itb.walker.walkPageSizes::4K 845 71.61% 71.61% # Table walker page sizes translated
+system.cpu3.itb.walker.walkPageSizes::1M 335 28.39% 100.00% # Table walker page sizes translated
+system.cpu3.itb.walker.walkPageSizes::total 1180 # Table walker page sizes translated
system.cpu3.itb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
-system.cpu3.itb.walker.walkRequestOrigin_Requested::Inst 4586 # Table walker requests started/completed, data/inst
-system.cpu3.itb.walker.walkRequestOrigin_Requested::total 4586 # Table walker requests started/completed, data/inst
+system.cpu3.itb.walker.walkRequestOrigin_Requested::Inst 4255 # Table walker requests started/completed, data/inst
+system.cpu3.itb.walker.walkRequestOrigin_Requested::total 4255 # Table walker requests started/completed, data/inst
system.cpu3.itb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
-system.cpu3.itb.walker.walkRequestOrigin_Completed::Inst 1313 # Table walker requests started/completed, data/inst
-system.cpu3.itb.walker.walkRequestOrigin_Completed::total 1313 # Table walker requests started/completed, data/inst
-system.cpu3.itb.walker.walkRequestOrigin::total 5899 # Table walker requests started/completed, data/inst
-system.cpu3.itb.inst_hits 9766986 # ITB inst hits
-system.cpu3.itb.inst_misses 4586 # ITB inst misses
+system.cpu3.itb.walker.walkRequestOrigin_Completed::Inst 1180 # Table walker requests started/completed, data/inst
+system.cpu3.itb.walker.walkRequestOrigin_Completed::total 1180 # Table walker requests started/completed, data/inst
+system.cpu3.itb.walker.walkRequestOrigin::total 5435 # Table walker requests started/completed, data/inst
+system.cpu3.itb.inst_hits 9881127 # ITB inst hits
+system.cpu3.itb.inst_misses 4255 # ITB inst misses
system.cpu3.itb.read_hits 0 # DTB read hits
system.cpu3.itb.read_misses 0 # DTB read misses
system.cpu3.itb.write_hits 0 # DTB write hits
system.cpu3.itb.write_misses 0 # DTB write misses
-system.cpu3.itb.flush_tlb 162 # Number of times complete TLB was flushed
-system.cpu3.itb.flush_tlb_mva 274 # Number of times TLB was flushed by MVA
+system.cpu3.itb.flush_tlb 157 # Number of times complete TLB was flushed
+system.cpu3.itb.flush_tlb_mva 225 # Number of times TLB was flushed by MVA
system.cpu3.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
system.cpu3.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
-system.cpu3.itb.flush_entries 1310 # Number of entries that have been flushed from TLB
+system.cpu3.itb.flush_entries 1190 # Number of entries that have been flushed from TLB
system.cpu3.itb.align_faults 0 # Number of TLB faults due to alignment restrictions
system.cpu3.itb.prefetch_faults 0 # Number of TLB faults due to prefetch
system.cpu3.itb.domain_faults 0 # Number of TLB faults due to domain restrictions
-system.cpu3.itb.perms_faults 793 # Number of TLB faults due to permissions restrictions
+system.cpu3.itb.perms_faults 704 # Number of TLB faults due to permissions restrictions
system.cpu3.itb.read_accesses 0 # DTB read accesses
system.cpu3.itb.write_accesses 0 # DTB write accesses
-system.cpu3.itb.inst_accesses 9771572 # ITB inst accesses
-system.cpu3.itb.hits 9766986 # DTB hits
-system.cpu3.itb.misses 4586 # DTB misses
-system.cpu3.itb.accesses 9771572 # DTB accesses
-system.cpu3.numCycles 57688006 # number of cpu cycles simulated
+system.cpu3.itb.inst_accesses 9885382 # ITB inst accesses
+system.cpu3.itb.hits 9881127 # DTB hits
+system.cpu3.itb.misses 4255 # DTB misses
+system.cpu3.itb.accesses 9885382 # DTB accesses
+system.cpu3.numCycles 55785273 # number of cpu cycles simulated
system.cpu3.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu3.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu3.fetch.icacheStallCycles 20811649 # Number of cycles fetch is stalled on an Icache miss
-system.cpu3.fetch.Insts 52033022 # Number of instructions fetch has processed
-system.cpu3.fetch.Branches 13252062 # Number of branches that fetch encountered
-system.cpu3.fetch.predictedBranches 9316448 # Number of branches that fetch has predicted taken
-system.cpu3.fetch.Cycles 33930227 # Number of cycles fetch has run and was not squashing or blocked
-system.cpu3.fetch.SquashCycles 1581201 # Number of cycles fetch has spent squashing
-system.cpu3.fetch.TlbCycles 68181 # Number of cycles fetch has spent waiting for tlb
-system.cpu3.fetch.MiscStallCycles 837 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
-system.cpu3.fetch.PendingDrainCycles 231 # Number of cycles fetch has spent waiting on pipes to drain
-system.cpu3.fetch.PendingTrapStallCycles 120341 # Number of stall cycles due to pending traps
-system.cpu3.fetch.PendingQuiesceStallCycles 80383 # Number of stall cycles due to pending quiesce instructions
-system.cpu3.fetch.IcacheWaitRetryStallCycles 479 # Number of stall cycles due to full MSHR
-system.cpu3.fetch.CacheLines 9765486 # Number of cache lines fetched
-system.cpu3.fetch.IcacheSquashes 207700 # Number of outstanding Icache misses that were squashed
-system.cpu3.fetch.ItlbSquashes 2399 # Number of outstanding ITLB misses that were squashed
-system.cpu3.fetch.rateDist::samples 55802907 # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::mean 1.126480 # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::stdev 2.271736 # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.icacheStallCycles 20908003 # Number of cycles fetch is stalled on an Icache miss
+system.cpu3.fetch.Insts 53885921 # Number of instructions fetch has processed
+system.cpu3.fetch.Branches 13553669 # Number of branches that fetch encountered
+system.cpu3.fetch.predictedBranches 9478152 # Number of branches that fetch has predicted taken
+system.cpu3.fetch.Cycles 32386359 # Number of cycles fetch has run and was not squashing or blocked
+system.cpu3.fetch.SquashCycles 1568366 # Number of cycles fetch has spent squashing
+system.cpu3.fetch.TlbCycles 62721 # Number of cycles fetch has spent waiting for tlb
+system.cpu3.fetch.MiscStallCycles 789 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
+system.cpu3.fetch.PendingDrainCycles 205 # Number of cycles fetch has spent waiting on pipes to drain
+system.cpu3.fetch.PendingTrapStallCycles 111844 # Number of stall cycles due to pending traps
+system.cpu3.fetch.PendingQuiesceStallCycles 71140 # Number of stall cycles due to pending quiesce instructions
+system.cpu3.fetch.IcacheWaitRetryStallCycles 397 # Number of stall cycles due to full MSHR
+system.cpu3.fetch.CacheLines 9879794 # Number of cache lines fetched
+system.cpu3.fetch.IcacheSquashes 204446 # Number of outstanding Icache misses that were squashed
+system.cpu3.fetch.ItlbSquashes 2262 # Number of outstanding ITLB misses that were squashed
+system.cpu3.fetch.rateDist::samples 54325621 # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::mean 1.196451 # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::stdev 2.331638 # Number of instructions fetched each cycle (Total)
system.cpu3.fetch.rateDist::underflows 0 0.00% 0.00% # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::0 41696580 74.72% 74.72% # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::1 1836235 3.29% 78.01% # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::2 1165184 2.09% 80.10% # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::3 3688211 6.61% 86.71% # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::4 906128 1.62% 88.33% # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::5 549241 0.98% 89.32% # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::6 2914438 5.22% 94.54% # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::7 602830 1.08% 95.62% # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::8 2444060 4.38% 100.00% # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::0 39861207 73.37% 73.37% # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::1 1851185 3.41% 76.78% # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::2 1193872 2.20% 78.98% # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::3 3684209 6.78% 85.76% # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::4 942616 1.74% 87.50% # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::5 608186 1.12% 88.62% # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::6 2968602 5.46% 94.08% # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::7 642558 1.18% 95.26% # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.rateDist::8 2573186 4.74% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu3.fetch.rateDist::overflows 0 0.00% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu3.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total)
system.cpu3.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.rateDist::total 55802907 # Number of instructions fetched each cycle (Total)
-system.cpu3.fetch.branchRate 0.229720 # Number of branch fetches per cycle
-system.cpu3.fetch.rate 0.901973 # Number of inst fetches per cycle
-system.cpu3.decode.IdleCycles 14568551 # Number of cycles decode is idle
-system.cpu3.decode.BlockedCycles 31866325 # Number of cycles decode is blocked
-system.cpu3.decode.RunCycles 7772560 # Number of cycles decode is running
-system.cpu3.decode.UnblockCycles 890718 # Number of cycles decode is unblocking
-system.cpu3.decode.SquashCycles 704494 # Number of cycles decode is squashing
-system.cpu3.decode.BranchResolved 971899 # Number of times decode resolved a branch
-system.cpu3.decode.BranchMispred 87220 # Number of times decode detected a branch misprediction
-system.cpu3.decode.DecodedInsts 44590073 # Number of instructions handled by decode
-system.cpu3.decode.SquashedInsts 289455 # Number of squashed instructions handled by decode
-system.cpu3.rename.SquashCycles 704494 # Number of cycles rename is squashing
-system.cpu3.rename.IdleCycles 15048291 # Number of cycles rename is idle
-system.cpu3.rename.BlockCycles 3770246 # Number of cycles rename is blocking
-system.cpu3.rename.serializeStallCycles 21829644 # count of cycles rename stalled for serializing inst
-system.cpu3.rename.RunCycles 8174749 # Number of cycles rename is running
-system.cpu3.rename.UnblockCycles 6275200 # Number of cycles rename is unblocking
-system.cpu3.rename.RenamedInsts 42740400 # Number of instructions processed by rename
-system.cpu3.rename.ROBFullEvents 1148 # Number of times rename has blocked due to ROB full
-system.cpu3.rename.IQFullEvents 970300 # Number of times rename has blocked due to IQ full
-system.cpu3.rename.LQFullEvents 89126 # Number of times rename has blocked due to LQ full
-system.cpu3.rename.SQFullEvents 4852570 # Number of times rename has blocked due to SQ full
-system.cpu3.rename.RenamedOperands 44469975 # Number of destination operands rename has renamed
-system.cpu3.rename.RenameLookups 196242063 # Number of register rename lookups that rename has made
-system.cpu3.rename.int_rename_lookups 47658053 # Number of integer rename lookups
-system.cpu3.rename.fp_rename_lookups 4195 # Number of floating rename lookups
-system.cpu3.rename.CommittedMaps 37088424 # Number of HB maps that are committed
-system.cpu3.rename.UndoneMaps 7381551 # Number of HB maps that are undone due to squashing
-system.cpu3.rename.serializingInsts 715073 # count of serializing insts renamed
-system.cpu3.rename.tempSerializingInsts 665430 # count of temporary serializing insts renamed
-system.cpu3.rename.skidInsts 5054867 # count of insts added to the skid buffer
-system.cpu3.memDep0.insertedLoads 7671703 # Number of loads inserted to the mem dependence unit.
-system.cpu3.memDep0.insertedStores 5900822 # Number of stores inserted to the mem dependence unit.
-system.cpu3.memDep0.conflictingLoads 1096118 # Number of conflicting loads.
-system.cpu3.memDep0.conflictingStores 1546348 # Number of conflicting stores.
-system.cpu3.iq.iqInstsAdded 41143800 # Number of instructions added to the IQ (excludes non-spec)
-system.cpu3.iq.iqNonSpecInstsAdded 502182 # Number of non-speculative instructions added to the IQ
-system.cpu3.iq.iqInstsIssued 39136171 # Number of instructions issued
-system.cpu3.iq.iqSquashedInstsIssued 53747 # Number of squashed instructions issued
-system.cpu3.iq.iqSquashedInstsExamined 5932287 # Number of squashed instructions iterated over during squash; mainly for profiling
-system.cpu3.iq.iqSquashedOperandsExamined 13678209 # Number of squashed operands that are examined and possibly removed from graph
-system.cpu3.iq.iqSquashedNonSpecRemoved 53132 # Number of squashed non-spec instructions that were removed
-system.cpu3.iq.issued_per_cycle::samples 55802907 # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::mean 0.701329 # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::stdev 1.406589 # Number of insts issued each cycle
+system.cpu3.fetch.rateDist::total 54325621 # Number of instructions fetched each cycle (Total)
+system.cpu3.fetch.branchRate 0.242961 # Number of branch fetches per cycle
+system.cpu3.fetch.rate 0.965952 # Number of inst fetches per cycle
+system.cpu3.decode.IdleCycles 14640830 # Number of cycles decode is idle
+system.cpu3.decode.BlockedCycles 30019697 # Number of cycles decode is blocked
+system.cpu3.decode.RunCycles 7950688 # Number of cycles decode is running
+system.cpu3.decode.UnblockCycles 1013386 # Number of cycles decode is unblocking
+system.cpu3.decode.SquashCycles 700819 # Number of cycles decode is squashing
+system.cpu3.decode.BranchResolved 1055619 # Number of times decode resolved a branch
+system.cpu3.decode.BranchMispred 84442 # Number of times decode detected a branch misprediction
+system.cpu3.decode.DecodedInsts 46804919 # Number of instructions handled by decode
+system.cpu3.decode.SquashedInsts 276831 # Number of squashed instructions handled by decode
+system.cpu3.rename.SquashCycles 700819 # Number of cycles rename is squashing
+system.cpu3.rename.IdleCycles 15165685 # Number of cycles rename is idle
+system.cpu3.rename.BlockCycles 3026849 # Number of cycles rename is blocking
+system.cpu3.rename.serializeStallCycles 21377967 # count of cycles rename stalled for serializing inst
+system.cpu3.rename.RunCycles 8430789 # Number of cycles rename is running
+system.cpu3.rename.UnblockCycles 5623288 # Number of cycles rename is unblocking
+system.cpu3.rename.RenamedInsts 44934032 # Number of instructions processed by rename
+system.cpu3.rename.ROBFullEvents 688 # Number of times rename has blocked due to ROB full
+system.cpu3.rename.IQFullEvents 1185922 # Number of times rename has blocked due to IQ full
+system.cpu3.rename.LQFullEvents 108960 # Number of times rename has blocked due to LQ full
+system.cpu3.rename.SQFullEvents 3941702 # Number of times rename has blocked due to SQ full
+system.cpu3.rename.RenamedOperands 46859897 # Number of destination operands rename has renamed
+system.cpu3.rename.RenameLookups 206328923 # Number of register rename lookups that rename has made
+system.cpu3.rename.int_rename_lookups 50493322 # Number of integer rename lookups
+system.cpu3.rename.fp_rename_lookups 4028 # Number of floating rename lookups
+system.cpu3.rename.CommittedMaps 39227152 # Number of HB maps that are committed
+system.cpu3.rename.UndoneMaps 7632745 # Number of HB maps that are undone due to squashing
+system.cpu3.rename.serializingInsts 719514 # count of serializing insts renamed
+system.cpu3.rename.tempSerializingInsts 667644 # count of temporary serializing insts renamed
+system.cpu3.rename.skidInsts 5723010 # count of insts added to the skid buffer
+system.cpu3.memDep0.insertedLoads 7961886 # Number of loads inserted to the mem dependence unit.
+system.cpu3.memDep0.insertedStores 6281204 # Number of stores inserted to the mem dependence unit.
+system.cpu3.memDep0.conflictingLoads 1151663 # Number of conflicting loads.
+system.cpu3.memDep0.conflictingStores 1548732 # Number of conflicting stores.
+system.cpu3.iq.iqInstsAdded 43283754 # Number of instructions added to the IQ (excludes non-spec)
+system.cpu3.iq.iqNonSpecInstsAdded 518690 # Number of non-speculative instructions added to the IQ
+system.cpu3.iq.iqInstsIssued 41211343 # Number of instructions issued
+system.cpu3.iq.iqSquashedInstsIssued 55539 # Number of squashed instructions issued
+system.cpu3.iq.iqSquashedInstsExamined 6082671 # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu3.iq.iqSquashedOperandsExamined 14073441 # Number of squashed operands that are examined and possibly removed from graph
+system.cpu3.iq.iqSquashedNonSpecRemoved 54569 # Number of squashed non-spec instructions that were removed
+system.cpu3.iq.issued_per_cycle::samples 54325621 # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::mean 0.758599 # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::stdev 1.457347 # Number of insts issued each cycle
system.cpu3.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::0 40242389 72.12% 72.12% # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::1 5178782 9.28% 81.40% # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::2 3976738 7.13% 88.52% # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::3 3203416 5.74% 94.26% # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::4 1255770 2.25% 96.51% # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::5 764374 1.37% 97.88% # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::6 832269 1.49% 99.37% # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::7 238251 0.43% 99.80% # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::8 110918 0.20% 100.00% # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::0 38109275 70.15% 70.15% # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::1 5329887 9.81% 79.96% # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::2 4096389 7.54% 87.50% # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::3 3334773 6.14% 93.64% # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::4 1373143 2.53% 96.17% # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::5 820036 1.51% 97.68% # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::6 873869 1.61% 99.29% # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::7 257599 0.47% 99.76% # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::8 130650 0.24% 100.00% # Number of insts issued each cycle
system.cpu3.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle
system.cpu3.iq.issued_per_cycle::min_value 0 # Number of insts issued each cycle
system.cpu3.iq.issued_per_cycle::max_value 8 # Number of insts issued each cycle
-system.cpu3.iq.issued_per_cycle::total 55802907 # Number of insts issued each cycle
+system.cpu3.iq.issued_per_cycle::total 54325621 # Number of insts issued each cycle
system.cpu3.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available
-system.cpu3.iq.fu_full::IntAlu 55578 9.37% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::IntMult 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::IntDiv 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::FloatAdd 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::FloatCmp 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::FloatCvt 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::FloatMult 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::FloatDiv 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::FloatSqrt 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdAdd 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdAddAcc 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdAlu 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdCmp 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdCvt 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdMisc 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdMult 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdMultAcc 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdShift 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdShiftAcc 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdSqrt 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdFloatAdd 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdFloatAlu 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdFloatCmp 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdFloatCvt 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdFloatDiv 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdFloatMisc 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdFloatMult 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdFloatMultAcc 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::SimdFloatSqrt 0 0.00% 9.37% # attempts to use FU when none available
-system.cpu3.iq.fu_full::MemRead 279414 47.11% 56.48% # attempts to use FU when none available
-system.cpu3.iq.fu_full::MemWrite 258161 43.52% 100.00% # attempts to use FU when none available
+system.cpu3.iq.fu_full::IntAlu 64574 10.28% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::IntMult 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::IntDiv 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::FloatAdd 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::FloatCmp 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::FloatCvt 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::FloatMult 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::FloatDiv 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::FloatSqrt 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdAdd 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdAddAcc 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdAlu 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdCmp 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdCvt 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdMisc 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdMult 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdMultAcc 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdShift 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdShiftAcc 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdSqrt 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdFloatAdd 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdFloatAlu 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdFloatCmp 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdFloatCvt 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdFloatDiv 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdFloatMisc 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdFloatMult 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdFloatMultAcc 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::SimdFloatSqrt 0 0.00% 10.28% # attempts to use FU when none available
+system.cpu3.iq.fu_full::MemRead 290075 46.19% 56.47% # attempts to use FU when none available
+system.cpu3.iq.fu_full::MemWrite 273390 43.53% 100.00% # attempts to use FU when none available
system.cpu3.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu3.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
-system.cpu3.iq.FU_type_0::No_OpClass 84 0.00% 0.00% # Type of FU issued
-system.cpu3.iq.FU_type_0::IntAlu 26095745 66.68% 66.68% # Type of FU issued
-system.cpu3.iq.FU_type_0::IntMult 29921 0.08% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::IntDiv 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::FloatAdd 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::FloatCmp 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::FloatCvt 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::FloatMult 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::FloatDiv 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::FloatSqrt 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdAdd 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdAddAcc 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdAlu 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdCmp 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdCvt 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdMisc 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdMult 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdMultAcc 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdShift 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdShiftAcc 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdSqrt 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdFloatAdd 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdFloatAlu 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdFloatCmp 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdFloatCvt 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdFloatDiv 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdFloatMisc 2385 0.01% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdFloatMult 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdFloatMultAcc 2 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::SimdFloatSqrt 0 0.00% 66.76% # Type of FU issued
-system.cpu3.iq.FU_type_0::MemRead 7397516 18.90% 85.66% # Type of FU issued
-system.cpu3.iq.FU_type_0::MemWrite 5610518 14.34% 100.00% # Type of FU issued
+system.cpu3.iq.FU_type_0::No_OpClass 62 0.00% 0.00% # Type of FU issued
+system.cpu3.iq.FU_type_0::IntAlu 27512271 66.76% 66.76% # Type of FU issued
+system.cpu3.iq.FU_type_0::IntMult 31067 0.08% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::IntDiv 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::FloatAdd 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::FloatCmp 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::FloatCvt 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::FloatMult 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::FloatDiv 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::FloatSqrt 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdAdd 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdAddAcc 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdAlu 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdCmp 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdCvt 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdMisc 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdMult 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdMultAcc 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdShift 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdShiftAcc 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdSqrt 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdFloatAdd 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdFloatAlu 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdFloatCmp 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdFloatCvt 0 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdFloatDiv 2 0.00% 66.83% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdFloatMisc 2328 0.01% 66.84% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdFloatMult 0 0.00% 66.84% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdFloatMultAcc 8 0.00% 66.84% # Type of FU issued
+system.cpu3.iq.FU_type_0::SimdFloatSqrt 0 0.00% 66.84% # Type of FU issued
+system.cpu3.iq.FU_type_0::MemRead 7676586 18.63% 85.47% # Type of FU issued
+system.cpu3.iq.FU_type_0::MemWrite 5989019 14.53% 100.00% # Type of FU issued
system.cpu3.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued
system.cpu3.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
-system.cpu3.iq.FU_type_0::total 39136171 # Type of FU issued
-system.cpu3.iq.rate 0.678411 # Inst issue rate
-system.cpu3.iq.fu_busy_cnt 593153 # FU busy when requested
-system.cpu3.iq.fu_busy_rate 0.015156 # FU busy rate (busy events/executed inst)
-system.cpu3.iq.int_inst_queue_reads 134713370 # Number of integer instruction queue reads
-system.cpu3.iq.int_inst_queue_writes 47601786 # Number of integer instruction queue writes
-system.cpu3.iq.int_inst_queue_wakeup_accesses 37987762 # Number of integer instruction queue wakeup accesses
-system.cpu3.iq.fp_inst_queue_reads 8779 # Number of floating instruction queue reads
-system.cpu3.iq.fp_inst_queue_writes 5136 # Number of floating instruction queue writes
-system.cpu3.iq.fp_inst_queue_wakeup_accesses 3873 # Number of floating instruction queue wakeup accesses
-system.cpu3.iq.int_alu_accesses 39724534 # Number of integer alu accesses
-system.cpu3.iq.fp_alu_accesses 4706 # Number of floating point alu accesses
-system.cpu3.iew.lsq.thread0.forwLoads 167566 # Number of loads that had data forwarded from stores
+system.cpu3.iq.FU_type_0::total 41211343 # Type of FU issued
+system.cpu3.iq.rate 0.738750 # Inst issue rate
+system.cpu3.iq.fu_busy_cnt 628039 # FU busy when requested
+system.cpu3.iq.fu_busy_rate 0.015239 # FU busy rate (busy events/executed inst)
+system.cpu3.iq.int_inst_queue_reads 137423296 # Number of integer instruction queue reads
+system.cpu3.iq.int_inst_queue_writes 49907895 # Number of integer instruction queue writes
+system.cpu3.iq.int_inst_queue_wakeup_accesses 40057354 # Number of integer instruction queue wakeup accesses
+system.cpu3.iq.fp_inst_queue_reads 8589 # Number of floating instruction queue reads
+system.cpu3.iq.fp_inst_queue_writes 4965 # Number of floating instruction queue writes
+system.cpu3.iq.fp_inst_queue_wakeup_accesses 3611 # Number of floating instruction queue wakeup accesses
+system.cpu3.iq.int_alu_accesses 41834646 # Number of integer alu accesses
+system.cpu3.iq.fp_alu_accesses 4674 # Number of floating point alu accesses
+system.cpu3.iew.lsq.thread0.forwLoads 172531 # Number of loads that had data forwarded from stores
system.cpu3.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
-system.cpu3.iew.lsq.thread0.squashedLoads 1160486 # Number of loads squashed
-system.cpu3.iew.lsq.thread0.ignoredResponses 1105 # Number of memory responses ignored because the instruction is squashed
-system.cpu3.iew.lsq.thread0.memOrderViolation 29281 # Number of memory ordering violations
-system.cpu3.iew.lsq.thread0.squashedStores 565962 # Number of stores squashed
+system.cpu3.iew.lsq.thread0.squashedLoads 1192076 # Number of loads squashed
+system.cpu3.iew.lsq.thread0.ignoredResponses 1205 # Number of memory responses ignored because the instruction is squashed
+system.cpu3.iew.lsq.thread0.memOrderViolation 28350 # Number of memory ordering violations
+system.cpu3.iew.lsq.thread0.squashedStores 578137 # Number of stores squashed
system.cpu3.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address
system.cpu3.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding
-system.cpu3.iew.lsq.thread0.rescheduledLoads 108568 # Number of loads that were rescheduled
-system.cpu3.iew.lsq.thread0.cacheBlocked 42515 # Number of times an access to memory failed due to the cache being blocked
+system.cpu3.iew.lsq.thread0.rescheduledLoads 104077 # Number of loads that were rescheduled
+system.cpu3.iew.lsq.thread0.cacheBlocked 43928 # Number of times an access to memory failed due to the cache being blocked
system.cpu3.iew.iewIdleCycles 0 # Number of cycles IEW is idle
-system.cpu3.iew.iewSquashCycles 704494 # Number of cycles IEW is squashing
-system.cpu3.iew.iewBlockCycles 3163832 # Number of cycles IEW is blocking
-system.cpu3.iew.iewUnblockCycles 480485 # Number of cycles IEW is unblocking
-system.cpu3.iew.iewDispatchedInsts 41688387 # Number of instructions dispatched to IQ
-system.cpu3.iew.iewDispSquashedInsts 67679 # Number of squashed instructions skipped by dispatch
-system.cpu3.iew.iewDispLoadInsts 7671703 # Number of dispatched load instructions
-system.cpu3.iew.iewDispStoreInsts 5900822 # Number of dispatched store instructions
-system.cpu3.iew.iewDispNonSpecInsts 259528 # Number of dispatched non-speculative instructions
-system.cpu3.iew.iewIQFullEvents 22774 # Number of times the IQ has become full, causing a stall
-system.cpu3.iew.iewLSQFullEvents 451647 # Number of times the LSQ has become full, causing a stall
-system.cpu3.iew.memOrderViolationEvents 29281 # Number of memory order violations
-system.cpu3.iew.predictedTakenIncorrect 127480 # Number of branches that were predicted taken incorrectly
-system.cpu3.iew.predictedNotTakenIncorrect 130164 # Number of branches that were predicted not taken incorrectly
-system.cpu3.iew.branchMispredicts 257644 # Number of branch mispredicts detected at execute
-system.cpu3.iew.iewExecutedInsts 38819012 # Number of executed instructions
-system.cpu3.iew.iewExecLoadInsts 7269209 # Number of load instructions executed
-system.cpu3.iew.iewExecSquashedInsts 283254 # Number of squashed instructions skipped in execute
+system.cpu3.iew.iewSquashCycles 700819 # Number of cycles IEW is squashing
+system.cpu3.iew.iewBlockCycles 2631103 # Number of cycles IEW is blocking
+system.cpu3.iew.iewUnblockCycles 281724 # Number of cycles IEW is unblocking
+system.cpu3.iew.iewDispatchedInsts 43863625 # Number of instructions dispatched to IQ
+system.cpu3.iew.iewDispSquashedInsts 65733 # Number of squashed instructions skipped by dispatch
+system.cpu3.iew.iewDispLoadInsts 7961886 # Number of dispatched load instructions
+system.cpu3.iew.iewDispStoreInsts 6281204 # Number of dispatched store instructions
+system.cpu3.iew.iewDispNonSpecInsts 267636 # Number of dispatched non-speculative instructions
+system.cpu3.iew.iewIQFullEvents 25569 # Number of times the IQ has become full, causing a stall
+system.cpu3.iew.iewLSQFullEvents 250025 # Number of times the LSQ has become full, causing a stall
+system.cpu3.iew.memOrderViolationEvents 28350 # Number of memory order violations
+system.cpu3.iew.predictedTakenIncorrect 127807 # Number of branches that were predicted taken incorrectly
+system.cpu3.iew.predictedNotTakenIncorrect 129932 # Number of branches that were predicted not taken incorrectly
+system.cpu3.iew.branchMispredicts 257739 # Number of branch mispredicts detected at execute
+system.cpu3.iew.iewExecutedInsts 40889959 # Number of executed instructions
+system.cpu3.iew.iewExecLoadInsts 7546719 # Number of load instructions executed
+system.cpu3.iew.iewExecSquashedInsts 287191 # Number of squashed instructions skipped in execute
system.cpu3.iew.exec_swp 0 # number of swp insts executed
-system.cpu3.iew.exec_nop 42405 # number of nop insts executed
-system.cpu3.iew.exec_refs 12824644 # number of memory reference insts executed
-system.cpu3.iew.exec_branches 7229166 # Number of branches executed
-system.cpu3.iew.exec_stores 5555435 # Number of stores executed
-system.cpu3.iew.exec_rate 0.672913 # Inst execution rate
-system.cpu3.iew.wb_sent 38534594 # cumulative count of insts sent to commit
-system.cpu3.iew.wb_count 37991635 # cumulative count of insts written-back
-system.cpu3.iew.wb_producers 19895864 # num instructions producing a value
-system.cpu3.iew.wb_consumers 34654258 # num instructions consuming a value
-system.cpu3.iew.wb_rate 0.658571 # insts written-back per cycle
-system.cpu3.iew.wb_fanout 0.574125 # average fanout of values written-back
-system.cpu3.commit.commitSquashedInsts 5941608 # The number of squashed insts skipped by commit
-system.cpu3.commit.commitNonSpecStalls 449050 # The number of times commit has been forced to stall to communicate backwards
-system.cpu3.commit.branchMispredicts 213879 # The number of times a branch was mispredicted
-system.cpu3.commit.committed_per_cycle::samples 54520380 # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::mean 0.655522 # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::stdev 1.547792 # Number of insts commited each cycle
+system.cpu3.iew.exec_nop 61181 # number of nop insts executed
+system.cpu3.iew.exec_refs 13479054 # number of memory reference insts executed
+system.cpu3.iew.exec_branches 7536416 # Number of branches executed
+system.cpu3.iew.exec_stores 5932335 # Number of stores executed
+system.cpu3.iew.exec_rate 0.732988 # Inst execution rate
+system.cpu3.iew.wb_sent 40598245 # cumulative count of insts sent to commit
+system.cpu3.iew.wb_count 40060965 # cumulative count of insts written-back
+system.cpu3.iew.wb_producers 21086862 # num instructions producing a value
+system.cpu3.iew.wb_consumers 37255215 # num instructions consuming a value
+system.cpu3.iew.wb_rate 0.718128 # insts written-back per cycle
+system.cpu3.iew.wb_fanout 0.566011 # average fanout of values written-back
+system.cpu3.commit.commitSquashedInsts 6097187 # The number of squashed insts skipped by commit
+system.cpu3.commit.commitNonSpecStalls 464121 # The number of times commit has been forced to stall to communicate backwards
+system.cpu3.commit.branchMispredicts 213352 # The number of times a branch was mispredicted
+system.cpu3.commit.committed_per_cycle::samples 53027988 # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::mean 0.712050 # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::stdev 1.609623 # Number of insts commited each cycle
system.cpu3.commit.committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::0 40723432 74.69% 74.69% # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::1 6130706 11.24% 85.94% # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::2 3105147 5.70% 91.63% # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::3 1318175 2.42% 94.05% # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::4 725189 1.33% 95.38% # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::5 499185 0.92% 96.30% # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::6 937323 1.72% 98.02% # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::7 226618 0.42% 98.43% # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::8 854605 1.57% 100.00% # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::0 38640336 72.87% 72.87% # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::1 6301176 11.88% 84.75% # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::2 3204029 6.04% 90.79% # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::3 1405492 2.65% 93.44% # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::4 791559 1.49% 94.94% # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::5 551412 1.04% 95.98% # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::6 959183 1.81% 97.78% # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::7 243958 0.46% 98.24% # Number of insts commited each cycle
+system.cpu3.commit.committed_per_cycle::8 930843 1.76% 100.00% # Number of insts commited each cycle
system.cpu3.commit.committed_per_cycle::overflows 0 0.00% 100.00% # Number of insts commited each cycle
system.cpu3.commit.committed_per_cycle::min_value 0 # Number of insts commited each cycle
system.cpu3.commit.committed_per_cycle::max_value 8 # Number of insts commited each cycle
-system.cpu3.commit.committed_per_cycle::total 54520380 # Number of insts commited each cycle
-system.cpu3.commit.committedInsts 29254285 # Number of instructions committed
-system.cpu3.commit.committedOps 35739310 # Number of ops (including micro ops) committed
+system.cpu3.commit.committed_per_cycle::total 53027988 # Number of insts commited each cycle
+system.cpu3.commit.committedInsts 30988188 # Number of instructions committed
+system.cpu3.commit.committedOps 37758554 # Number of ops (including micro ops) committed
system.cpu3.commit.swp_count 0 # Number of s/w prefetches committed
-system.cpu3.commit.refs 11846077 # Number of memory references committed
-system.cpu3.commit.loads 6511217 # Number of loads committed
-system.cpu3.commit.membars 174051 # Number of memory barriers committed
-system.cpu3.commit.branches 6823843 # Number of branches committed
-system.cpu3.commit.fp_insts 3728 # Number of committed floating point instructions.
-system.cpu3.commit.int_insts 31222167 # Number of committed integer instructions.
-system.cpu3.commit.function_calls 1239499 # Number of function calls committed.
+system.cpu3.commit.refs 12472877 # Number of memory references committed
+system.cpu3.commit.loads 6769810 # Number of loads committed
+system.cpu3.commit.membars 181184 # Number of memory barriers committed
+system.cpu3.commit.branches 7122308 # Number of branches committed
+system.cpu3.commit.fp_insts 3347 # Number of committed floating point instructions.
+system.cpu3.commit.int_insts 32924881 # Number of committed integer instructions.
+system.cpu3.commit.function_calls 1244375 # Number of function calls committed.
system.cpu3.commit.op_class_0::No_OpClass 0 0.00% 0.00% # Class of committed instruction
-system.cpu3.commit.op_class_0::IntAlu 23861884 66.77% 66.77% # Class of committed instruction
-system.cpu3.commit.op_class_0::IntMult 28964 0.08% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::IntDiv 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::FloatAdd 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::FloatCmp 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::FloatCvt 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::FloatMult 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::FloatDiv 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::FloatSqrt 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdAdd 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdAddAcc 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdAlu 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdCmp 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdCvt 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdMisc 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdMult 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdMultAcc 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdShift 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdShiftAcc 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdSqrt 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdFloatAdd 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdFloatAlu 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdFloatCmp 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdFloatCvt 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdFloatDiv 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdFloatMisc 2385 0.01% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdFloatMult 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdFloatMultAcc 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::SimdFloatSqrt 0 0.00% 66.85% # Class of committed instruction
-system.cpu3.commit.op_class_0::MemRead 6511217 18.22% 85.07% # Class of committed instruction
-system.cpu3.commit.op_class_0::MemWrite 5334860 14.93% 100.00% # Class of committed instruction
+system.cpu3.commit.op_class_0::IntAlu 25253254 66.88% 66.88% # Class of committed instruction
+system.cpu3.commit.op_class_0::IntMult 30097 0.08% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::IntDiv 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::FloatAdd 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::FloatCmp 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::FloatCvt 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::FloatMult 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::FloatDiv 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::FloatSqrt 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdAdd 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdAddAcc 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdAlu 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdCmp 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdCvt 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdMisc 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdMult 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdMultAcc 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdShift 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdShiftAcc 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdSqrt 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdFloatAdd 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdFloatAlu 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdFloatCmp 0 0.00% 66.96% # Class of committed instruction
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+system.cpu3.commit.op_class_0::SimdFloatDiv 0 0.00% 66.96% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdFloatMisc 2326 0.01% 66.97% # Class of committed instruction
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+system.cpu3.commit.op_class_0::SimdFloatMultAcc 0 0.00% 66.97% # Class of committed instruction
+system.cpu3.commit.op_class_0::SimdFloatSqrt 0 0.00% 66.97% # Class of committed instruction
+system.cpu3.commit.op_class_0::MemRead 6769810 17.93% 84.90% # Class of committed instruction
+system.cpu3.commit.op_class_0::MemWrite 5703067 15.10% 100.00% # Class of committed instruction
system.cpu3.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu3.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
-system.cpu3.commit.op_class_0::total 35739310 # Class of committed instruction
-system.cpu3.commit.bw_lim_events 854605 # number cycles where commit BW limit reached
-system.cpu3.rob.rob_reads 89694977 # The number of ROB reads
-system.cpu3.rob.rob_writes 84644260 # The number of ROB writes
-system.cpu3.timesIdled 227108 # Number of times that the entire CPU went into an idle state and unscheduled itself
-system.cpu3.idleCycles 1885099 # Total number of cycles that the CPU has spent unscheduled due to idling
-system.cpu3.quiesceCycles 5160958859 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt
-system.cpu3.committedInsts 29228670 # Number of Instructions Simulated
-system.cpu3.committedOps 35713695 # Number of Ops (including micro ops) Simulated
-system.cpu3.cpi 1.973679 # CPI: Cycles Per Instruction
-system.cpu3.cpi_total 1.973679 # CPI: Total CPI of All Threads
-system.cpu3.ipc 0.506668 # IPC: Instructions Per Cycle
-system.cpu3.ipc_total 0.506668 # IPC: Total IPC of All Threads
-system.cpu3.int_regfile_reads 42269766 # number of integer regfile reads
-system.cpu3.int_regfile_writes 24060528 # number of integer regfile writes
-system.cpu3.fp_regfile_reads 14520 # number of floating regfile reads
-system.cpu3.fp_regfile_writes 12259 # number of floating regfile writes
-system.cpu3.cc_regfile_reads 137213612 # number of cc regfile reads
-system.cpu3.cc_regfile_writes 14769581 # number of cc regfile writes
-system.cpu3.misc_regfile_reads 75722157 # number of misc regfile reads
-system.cpu3.misc_regfile_writes 336126 # number of misc regfile writes
-system.iobus.trans_dist::ReadReq 30181 # Transaction distribution
-system.iobus.trans_dist::ReadResp 30181 # Transaction distribution
+system.cpu3.commit.op_class_0::total 37758554 # Class of committed instruction
+system.cpu3.commit.bw_lim_events 930843 # number cycles where commit BW limit reached
+system.cpu3.rob.rob_reads 90355965 # The number of ROB reads
+system.cpu3.rob.rob_writes 89008997 # The number of ROB writes
+system.cpu3.timesIdled 227180 # Number of times that the entire CPU went into an idle state and unscheduled itself
+system.cpu3.idleCycles 1459652 # Total number of cycles that the CPU has spent unscheduled due to idling
+system.cpu3.quiesceCycles 5161855344 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt
+system.cpu3.committedInsts 30949407 # Number of Instructions Simulated
+system.cpu3.committedOps 37719773 # Number of Ops (including micro ops) Simulated
+system.cpu3.cpi 1.802467 # CPI: Cycles Per Instruction
+system.cpu3.cpi_total 1.802467 # CPI: Total CPI of All Threads
+system.cpu3.ipc 0.554795 # IPC: Instructions Per Cycle
+system.cpu3.ipc_total 0.554795 # IPC: Total IPC of All Threads
+system.cpu3.int_regfile_reads 44810806 # number of integer regfile reads
+system.cpu3.int_regfile_writes 25112765 # number of integer regfile writes
+system.cpu3.fp_regfile_reads 14550 # number of floating regfile reads
+system.cpu3.fp_regfile_writes 12084 # number of floating regfile writes
+system.cpu3.cc_regfile_reads 144202792 # number of cc regfile reads
+system.cpu3.cc_regfile_writes 15932581 # number of cc regfile writes
+system.cpu3.misc_regfile_reads 74870960 # number of misc regfile reads
+system.cpu3.misc_regfile_writes 343753 # number of misc regfile writes
+system.iobus.trans_dist::ReadReq 30152 # Transaction distribution
+system.iobus.trans_dist::ReadResp 30152 # Transaction distribution
system.iobus.trans_dist::WriteReq 59010 # Transaction distribution
system.iobus.trans_dist::WriteResp 59010 # Transaction distribution
system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 54148 # Packet count per connected master and slave (bytes)
@@ -2105,9 +2117,9 @@ system.iobus.pkt_count_system.bridge.master::system.realview.mmc_fake.pio
system.iobus.pkt_count_system.bridge.master::system.realview.ide.pio 7244 # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.realview.ethernet.pio 42268 # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::total 105436 # Packet count per connected master and slave (bytes)
-system.iobus.pkt_count_system.realview.ide.dma::system.iocache.cpu_side 72946 # Packet count per connected master and slave (bytes)
-system.iobus.pkt_count_system.realview.ide.dma::total 72946 # Packet count per connected master and slave (bytes)
-system.iobus.pkt_count::total 178382 # Packet count per connected master and slave (bytes)
+system.iobus.pkt_count_system.realview.ide.dma::system.iocache.cpu_side 72888 # Packet count per connected master and slave (bytes)
+system.iobus.pkt_count_system.realview.ide.dma::total 72888 # Packet count per connected master and slave (bytes)
+system.iobus.pkt_count::total 178324 # Packet count per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.realview.uart.pio 67865 # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.realview.realview_io.pio 232 # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.realview.pci_host.pio 638 # Cumulative packet size per connected master and slave (bytes)
@@ -2128,791 +2140,845 @@ system.iobus.pkt_size_system.bridge.master::system.realview.mmc_fake.pio
system.iobus.pkt_size_system.bridge.master::system.realview.ide.pio 4753 # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::system.realview.ethernet.pio 84536 # Cumulative packet size per connected master and slave (bytes)
system.iobus.pkt_size_system.bridge.master::total 159093 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.pkt_size_system.realview.ide.dma::system.iocache.cpu_side 2321224 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.pkt_size_system.realview.ide.dma::total 2321224 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.pkt_size::total 2480317 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.reqLayer0.occupancy 27737500 # Layer occupancy (ticks)
+system.iobus.pkt_size_system.realview.ide.dma::system.iocache.cpu_side 2320992 # Cumulative packet size per connected master and slave (bytes)
+system.iobus.pkt_size_system.realview.ide.dma::total 2320992 # Cumulative packet size per connected master and slave (bytes)
+system.iobus.pkt_size::total 2480085 # Cumulative packet size per connected master and slave (bytes)
+system.iobus.reqLayer0.occupancy 30018500 # Layer occupancy (ticks)
system.iobus.reqLayer0.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer1.occupancy 101500 # Layer occupancy (ticks)
+system.iobus.reqLayer1.occupancy 102000 # Layer occupancy (ticks)
system.iobus.reqLayer1.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer2.occupancy 203000 # Layer occupancy (ticks)
+system.iobus.reqLayer2.occupancy 228500 # Layer occupancy (ticks)
system.iobus.reqLayer2.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer3.occupancy 19500 # Layer occupancy (ticks)
+system.iobus.reqLayer3.occupancy 20000 # Layer occupancy (ticks)
system.iobus.reqLayer3.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer4.occupancy 16000 # Layer occupancy (ticks)
+system.iobus.reqLayer4.occupancy 4000 # Layer occupancy (ticks)
system.iobus.reqLayer4.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer10.occupancy 13000 # Layer occupancy (ticks)
+system.iobus.reqLayer10.occupancy 1500 # Layer occupancy (ticks)
system.iobus.reqLayer10.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer16.occupancy 40000 # Layer occupancy (ticks)
+system.iobus.reqLayer16.occupancy 40500 # Layer occupancy (ticks)
system.iobus.reqLayer16.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer19.occupancy 3000 # Layer occupancy (ticks)
system.iobus.reqLayer19.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer20.occupancy 9000 # Layer occupancy (ticks)
system.iobus.reqLayer20.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer23.occupancy 3864000 # Layer occupancy (ticks)
+system.iobus.reqLayer23.occupancy 3980500 # Layer occupancy (ticks)
system.iobus.reqLayer23.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer24.occupancy 22351500 # Layer occupancy (ticks)
+system.iobus.reqLayer24.occupancy 22050500 # Layer occupancy (ticks)
system.iobus.reqLayer24.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer25.occupancy 78673017 # Layer occupancy (ticks)
+system.iobus.reqLayer25.occupancy 72564537 # Layer occupancy (ticks)
system.iobus.reqLayer25.utilization 0.0 # Layer utilization (%)
-system.iobus.respLayer0.occupancy 48334000 # Layer occupancy (ticks)
+system.iobus.respLayer0.occupancy 50308000 # Layer occupancy (ticks)
system.iobus.respLayer0.utilization 0.0 # Layer utilization (%)
-system.iobus.respLayer3.occupancy 15512000 # Layer occupancy (ticks)
+system.iobus.respLayer3.occupancy 14254000 # Layer occupancy (ticks)
system.iobus.respLayer3.utilization 0.0 # Layer utilization (%)
-system.iocache.tags.replacements 36409 # number of replacements
-system.iocache.tags.tagsinuse 1.005569 # Cycle average of tags in use
-system.iocache.tags.total_refs 30 # Total number of references to valid blocks.
-system.iocache.tags.sampled_refs 36425 # Sample count of references to valid blocks.
-system.iocache.tags.avg_refs 0.000824 # Average number of references to valid blocks.
-system.iocache.tags.warmup_cycle 249219554509 # Cycle when the warmup percentage was hit.
-system.iocache.tags.occ_blocks::realview.ide 1.005569 # Average occupied blocks per requestor
-system.iocache.tags.occ_percent::realview.ide 0.062848 # Average percentage of cache occupancy
-system.iocache.tags.occ_percent::total 0.062848 # Average percentage of cache occupancy
+system.iocache.tags.replacements 36410 # number of replacements
+system.iocache.tags.tagsinuse 1.002475 # Cycle average of tags in use
+system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
+system.iocache.tags.sampled_refs 36426 # Sample count of references to valid blocks.
+system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
+system.iocache.tags.warmup_cycle 248713478009 # Cycle when the warmup percentage was hit.
+system.iocache.tags.occ_blocks::realview.ide 1.002475 # Average occupied blocks per requestor
+system.iocache.tags.occ_percent::realview.ide 0.062655 # Average percentage of cache occupancy
+system.iocache.tags.occ_percent::total 0.062655 # Average percentage of cache occupancy
system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id
system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id
system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
-system.iocache.tags.tag_accesses 328227 # Number of tag accesses
-system.iocache.tags.data_accesses 328227 # Number of data accesses
-system.iocache.WriteLineReq_hits::realview.ide 29 # number of WriteLineReq hits
-system.iocache.WriteLineReq_hits::total 29 # number of WriteLineReq hits
-system.iocache.demand_hits::realview.ide 29 # number of demand (read+write) hits
-system.iocache.demand_hits::total 29 # number of demand (read+write) hits
-system.iocache.overall_hits::realview.ide 29 # number of overall hits
-system.iocache.overall_hits::total 29 # number of overall hits
-system.iocache.ReadReq_misses::realview.ide 249 # number of ReadReq misses
-system.iocache.ReadReq_misses::total 249 # number of ReadReq misses
-system.iocache.WriteLineReq_misses::realview.ide 36195 # number of WriteLineReq misses
-system.iocache.WriteLineReq_misses::total 36195 # number of WriteLineReq misses
+system.iocache.tags.tag_accesses 327996 # Number of tag accesses
+system.iocache.tags.data_accesses 327996 # Number of data accesses
+system.iocache.ReadReq_misses::realview.ide 220 # number of ReadReq misses
+system.iocache.ReadReq_misses::total 220 # number of ReadReq misses
+system.iocache.WriteLineReq_misses::realview.ide 36224 # number of WriteLineReq misses
+system.iocache.WriteLineReq_misses::total 36224 # number of WriteLineReq misses
system.iocache.demand_misses::realview.ide 36444 # number of demand (read+write) misses
system.iocache.demand_misses::total 36444 # number of demand (read+write) misses
system.iocache.overall_misses::realview.ide 36444 # number of overall misses
system.iocache.overall_misses::total 36444 # number of overall misses
-system.iocache.ReadReq_miss_latency::realview.ide 17512919 # number of ReadReq miss cycles
-system.iocache.ReadReq_miss_latency::total 17512919 # number of ReadReq miss cycles
-system.iocache.WriteLineReq_miss_latency::realview.ide 1907451098 # number of WriteLineReq miss cycles
-system.iocache.WriteLineReq_miss_latency::total 1907451098 # number of WriteLineReq miss cycles
-system.iocache.demand_miss_latency::realview.ide 1924964017 # number of demand (read+write) miss cycles
-system.iocache.demand_miss_latency::total 1924964017 # number of demand (read+write) miss cycles
-system.iocache.overall_miss_latency::realview.ide 1924964017 # number of overall miss cycles
-system.iocache.overall_miss_latency::total 1924964017 # number of overall miss cycles
-system.iocache.ReadReq_accesses::realview.ide 249 # number of ReadReq accesses(hits+misses)
-system.iocache.ReadReq_accesses::total 249 # number of ReadReq accesses(hits+misses)
+system.iocache.ReadReq_miss_latency::realview.ide 16064414 # number of ReadReq miss cycles
+system.iocache.ReadReq_miss_latency::total 16064414 # number of ReadReq miss cycles
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system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked
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system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
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-system.l2c.WritebackDirty_hits::total 692123 # number of WritebackDirty hits
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-system.l2c.WritebackClean_hits::total 1939703 # number of WritebackClean hits
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+system.l2c.ReadReq_mshr_miss_rate::cpu1.dtb.walker 0.000650 # mshr miss rate for ReadReq accesses
+system.l2c.ReadReq_mshr_miss_rate::cpu2.dtb.walker 0.002234 # mshr miss rate for ReadReq accesses
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+system.l2c.ReadReq_mshr_miss_rate::cpu3.dtb.walker 0.003362 # mshr miss rate for ReadReq accesses
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+system.l2c.ReadReq_mshr_miss_rate::total 0.002147 # mshr miss rate for ReadReq accesses
+system.l2c.UpgradeReq_mshr_miss_rate::cpu1.data 0.989605 # mshr miss rate for UpgradeReq accesses
+system.l2c.UpgradeReq_mshr_miss_rate::cpu2.data 0.981900 # mshr miss rate for UpgradeReq accesses
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+system.l2c.UpgradeReq_mshr_miss_rate::total 0.585704 # mshr miss rate for UpgradeReq accesses
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+system.l2c.ReadCleanReq_mshr_miss_rate::cpu1.inst 0.009062 # mshr miss rate for ReadCleanReq accesses
+system.l2c.ReadCleanReq_mshr_miss_rate::cpu2.inst 0.011223 # mshr miss rate for ReadCleanReq accesses
+system.l2c.ReadCleanReq_mshr_miss_rate::cpu3.inst 0.011128 # mshr miss rate for ReadCleanReq accesses
+system.l2c.ReadCleanReq_mshr_miss_rate::total 0.006734 # mshr miss rate for ReadCleanReq accesses
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+system.l2c.ReadSharedReq_mshr_miss_rate::cpu2.data 0.023037 # mshr miss rate for ReadSharedReq accesses
+system.l2c.ReadSharedReq_mshr_miss_rate::cpu3.data 0.030342 # mshr miss rate for ReadSharedReq accesses
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+system.l2c.demand_mshr_miss_rate::cpu1.dtb.walker 0.000650 # mshr miss rate for demand accesses
+system.l2c.demand_mshr_miss_rate::cpu1.inst 0.009062 # mshr miss rate for demand accesses
+system.l2c.demand_mshr_miss_rate::cpu1.data 0.135201 # mshr miss rate for demand accesses
+system.l2c.demand_mshr_miss_rate::cpu2.dtb.walker 0.002234 # mshr miss rate for demand accesses
+system.l2c.demand_mshr_miss_rate::cpu2.itb.walker 0.000865 # mshr miss rate for demand accesses
+system.l2c.demand_mshr_miss_rate::cpu2.inst 0.011223 # mshr miss rate for demand accesses
+system.l2c.demand_mshr_miss_rate::cpu2.data 0.213736 # mshr miss rate for demand accesses
+system.l2c.demand_mshr_miss_rate::cpu3.dtb.walker 0.003362 # mshr miss rate for demand accesses
+system.l2c.demand_mshr_miss_rate::cpu3.itb.walker 0.000266 # mshr miss rate for demand accesses
+system.l2c.demand_mshr_miss_rate::cpu3.inst 0.011128 # mshr miss rate for demand accesses
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+system.l2c.overall_mshr_miss_rate::cpu1.dtb.walker 0.000650 # mshr miss rate for overall accesses
+system.l2c.overall_mshr_miss_rate::cpu1.inst 0.009062 # mshr miss rate for overall accesses
+system.l2c.overall_mshr_miss_rate::cpu1.data 0.135201 # mshr miss rate for overall accesses
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+system.l2c.UpgradeReq_avg_mshr_miss_latency::cpu1.data 18974.789916 # average UpgradeReq mshr miss latency
+system.l2c.UpgradeReq_avg_mshr_miss_latency::cpu2.data 18981.566820 # average UpgradeReq mshr miss latency
+system.l2c.UpgradeReq_avg_mshr_miss_latency::cpu3.data 19021.709634 # average UpgradeReq mshr miss latency
+system.l2c.UpgradeReq_avg_mshr_miss_latency::total 18997.571342 # average UpgradeReq mshr miss latency
+system.l2c.SCUpgradeReq_avg_mshr_miss_latency::cpu3.data 32062.500000 # average SCUpgradeReq mshr miss latency
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+system.l2c.ReadExReq_avg_mshr_miss_latency::cpu2.data 67019.125313 # average ReadExReq mshr miss latency
+system.l2c.ReadExReq_avg_mshr_miss_latency::cpu3.data 72527.572774 # average ReadExReq mshr miss latency
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+system.l2c.ReadCleanReq_avg_mshr_miss_latency::cpu3.inst 73311.548643 # average ReadCleanReq mshr miss latency
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+system.l2c.ReadSharedReq_avg_mshr_miss_latency::cpu3.data 78755.978137 # average ReadSharedReq mshr miss latency
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+system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 163168.224299 # average ReadReq mshr uncacheable latency
+system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu2.data 196193.886156 # average ReadReq mshr uncacheable latency
+system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu3.data 202667.586650 # average ReadReq mshr uncacheable latency
+system.l2c.ReadReq_avg_mshr_uncacheable_latency::total 192775.819739 # average ReadReq mshr uncacheable latency
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+system.l2c.overall_avg_mshr_uncacheable_latency::cpu3.data 112384.716686 # average overall mshr uncacheable latency
+system.l2c.overall_avg_mshr_uncacheable_latency::total 108356.220675 # average overall mshr uncacheable latency
+system.membus.snoop_filter.tot_requests 348991 # Total number of requests made to the snoop filter.
+system.membus.snoop_filter.hit_single_requests 146410 # Number of requests hitting in the snoop filter with a single holder of the requested data.
+system.membus.snoop_filter.hit_multi_requests 473 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
+system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
+system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
system.membus.trans_dist::ReadReq 40114 # Transaction distribution
-system.membus.trans_dist::ReadResp 76256 # Transaction distribution
+system.membus.trans_dist::ReadResp 75609 # Transaction distribution
system.membus.trans_dist::WriteReq 27565 # Transaction distribution
system.membus.trans_dist::WriteResp 27565 # Transaction distribution
-system.membus.trans_dist::WritebackDirty 131145 # Transaction distribution
-system.membus.trans_dist::CleanEvict 8918 # Transaction distribution
-system.membus.trans_dist::UpgradeReq 4561 # Transaction distribution
-system.membus.trans_dist::SCUpgradeReq 8 # Transaction distribution
-system.membus.trans_dist::UpgradeResp 1773 # Transaction distribution
-system.membus.trans_dist::ReadExReq 137930 # Transaction distribution
-system.membus.trans_dist::ReadExResp 137930 # Transaction distribution
-system.membus.trans_dist::ReadSharedReq 36142 # Transaction distribution
-system.membus.trans_dist::InvalidateReq 36194 # Transaction distribution
-system.membus.trans_dist::InvalidateResp 21008 # Transaction distribution
+system.membus.trans_dist::WritebackDirty 128684 # Transaction distribution
+system.membus.trans_dist::CleanEvict 8545 # Transaction distribution
+system.membus.trans_dist::UpgradeReq 4547 # Transaction distribution
+system.membus.trans_dist::SCUpgradeReq 9 # Transaction distribution
+system.membus.trans_dist::UpgradeResp 1834 # Transaction distribution
+system.membus.trans_dist::ReadExReq 135487 # Transaction distribution
+system.membus.trans_dist::ReadExResp 135487 # Transaction distribution
+system.membus.trans_dist::ReadSharedReq 35495 # Transaction distribution
+system.membus.trans_dist::InvalidateReq 36224 # Transaction distribution
+system.membus.trans_dist::InvalidateResp 22240 # Transaction distribution
system.membus.pkt_count_system.l2c.mem_side::system.bridge.slave 105436 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.l2c.mem_side::system.realview.nvmem.port 10 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.l2c.mem_side::system.realview.gic.pio 2006 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 485390 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.l2c.mem_side::total 592842 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 93962 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.iocache.mem_side::total 93962 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total 686804 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 476439 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.l2c.mem_side::total 583891 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 95179 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.iocache.mem_side::total 95179 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 679070 # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.l2c.mem_side::system.bridge.slave 159093 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.l2c.mem_side::system.realview.nvmem.port 20 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.l2c.mem_side::system.realview.gic.pio 4012 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 17249660 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.l2c.mem_side::total 17412785 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 2320704 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.iocache.mem_side::total 2320704 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total 19733489 # Cumulative packet size per connected master and slave (bytes)
-system.membus.snoops 305 # Total snoops (count)
-system.membus.snoop_fanout::samples 422579 # Request fanout histogram
-system.membus.snoop_fanout::mean 1 # Request fanout histogram
-system.membus.snoop_fanout::stdev 0 # Request fanout histogram
+system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 16891580 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.l2c.mem_side::total 17054705 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 2321600 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.iocache.mem_side::total 2321600 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size::total 19376305 # Cumulative packet size per connected master and slave (bytes)
+system.membus.snoops 335 # Total snoops (count)
+system.membus.snoop_fanout::samples 342553 # Request fanout histogram
+system.membus.snoop_fanout::mean 0.015446 # Request fanout histogram
+system.membus.snoop_fanout::stdev 0.123318 # Request fanout histogram
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
-system.membus.snoop_fanout::1 422579 100.00% 100.00% # Request fanout histogram
+system.membus.snoop_fanout::0 337262 98.46% 98.46% # Request fanout histogram
+system.membus.snoop_fanout::1 5291 1.54% 100.00% # Request fanout histogram
system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
-system.membus.snoop_fanout::min_value 1 # Request fanout histogram
+system.membus.snoop_fanout::min_value 0 # Request fanout histogram
system.membus.snoop_fanout::max_value 1 # Request fanout histogram
-system.membus.snoop_fanout::total 422579 # Request fanout histogram
-system.membus.reqLayer0.occupancy 54358000 # Layer occupancy (ticks)
+system.membus.snoop_fanout::total 342553 # Request fanout histogram
+system.membus.reqLayer0.occupancy 56458000 # Layer occupancy (ticks)
system.membus.reqLayer0.utilization 0.0 # Layer utilization (%)
-system.membus.reqLayer2.occupancy 678498 # Layer occupancy (ticks)
+system.membus.reqLayer2.occupancy 682999 # Layer occupancy (ticks)
system.membus.reqLayer2.utilization 0.0 # Layer utilization (%)
-system.membus.reqLayer5.occupancy 480577516 # Layer occupancy (ticks)
+system.membus.reqLayer5.occupancy 493971550 # Layer occupancy (ticks)
system.membus.reqLayer5.utilization 0.0 # Layer utilization (%)
-system.membus.respLayer2.occupancy 576478500 # Layer occupancy (ticks)
+system.membus.respLayer2.occupancy 649041000 # Layer occupancy (ticks)
system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
-system.membus.respLayer3.occupancy 796581 # Layer occupancy (ticks)
+system.membus.respLayer3.occupancy 721087 # Layer occupancy (ticks)
system.membus.respLayer3.utilization 0.0 # Layer utilization (%)
system.realview.dcc.osc_cpu.clock 16667 # Clock period in ticks
system.realview.dcc.osc_ddr.clock 25000 # Clock period in ticks
@@ -2955,60 +3021,60 @@ system.realview.mcc.osc_clcd.clock 42105 # Cl
system.realview.mcc.osc_mcc.clock 20000 # Clock period in ticks
system.realview.mcc.osc_peripheral.clock 41667 # Clock period in ticks
system.realview.mcc.osc_system_bus.clock 41667 # Clock period in ticks
-system.toL2Bus.snoop_filter.tot_requests 5652843 # Total number of requests made to the snoop filter.
-system.toL2Bus.snoop_filter.hit_single_requests 2841066 # Number of requests hitting in the snoop filter with a single holder of the requested data.
-system.toL2Bus.snoop_filter.hit_multi_requests 44935 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.toL2Bus.snoop_filter.tot_snoops 620 # Total number of snoops made to the snoop filter.
-system.toL2Bus.snoop_filter.hit_single_snoops 620 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
+system.toL2Bus.snoop_filter.tot_requests 5640723 # Total number of requests made to the snoop filter.
+system.toL2Bus.snoop_filter.hit_single_requests 2834949 # Number of requests hitting in the snoop filter with a single holder of the requested data.
+system.toL2Bus.snoop_filter.hit_multi_requests 44718 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.toL2Bus.snoop_filter.tot_snoops 306 # Total number of snoops made to the snoop filter.
+system.toL2Bus.snoop_filter.hit_single_snoops 306 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.toL2Bus.trans_dist::ReadReq 111947 # Transaction distribution
-system.toL2Bus.trans_dist::ReadResp 2627538 # Transaction distribution
+system.toL2Bus.trans_dist::ReadReq 110707 # Transaction distribution
+system.toL2Bus.trans_dist::ReadResp 2619793 # Transaction distribution
system.toL2Bus.trans_dist::WriteReq 27565 # Transaction distribution
system.toL2Bus.trans_dist::WriteResp 27565 # Transaction distribution
-system.toL2Bus.trans_dist::WritebackDirty 760857 # Transaction distribution
-system.toL2Bus.trans_dist::WritebackClean 1977299 # Transaction distribution
-system.toL2Bus.trans_dist::CleanEvict 146342 # Transaction distribution
-system.toL2Bus.trans_dist::UpgradeReq 2855 # Transaction distribution
-system.toL2Bus.trans_dist::SCUpgradeReq 27 # Transaction distribution
-system.toL2Bus.trans_dist::UpgradeResp 2881 # Transaction distribution
-system.toL2Bus.trans_dist::ReadExReq 296355 # Transaction distribution
-system.toL2Bus.trans_dist::ReadExResp 296355 # Transaction distribution
-system.toL2Bus.trans_dist::ReadCleanReq 1977848 # Transaction distribution
-system.toL2Bus.trans_dist::ReadSharedReq 537745 # Transaction distribution
-system.toL2Bus.trans_dist::InvalidateReq 15186 # Transaction distribution
-system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 5950911 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 2624542 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_count_system.cpu0.itb.walker.dma::system.l2c.cpu_side 25489 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_count_system.cpu0.dtb.walker.dma::system.l2c.cpu_side 101525 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_count::total 8702467 # Packet count per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 253157304 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 97861113 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu0.itb.walker.dma::system.l2c.cpu_side 41336 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size_system.cpu0.dtb.walker.dma::system.l2c.cpu_side 179388 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.pkt_size::total 351239141 # Cumulative packet size per connected master and slave (bytes)
-system.toL2Bus.snoops 193521 # Total snoops (count)
-system.toL2Bus.snoop_fanout::samples 4203916 # Request fanout histogram
-system.toL2Bus.snoop_fanout::mean 0.021594 # Request fanout histogram
-system.toL2Bus.snoop_fanout::stdev 0.145353 # Request fanout histogram
+system.toL2Bus.trans_dist::WritebackDirty 747367 # Transaction distribution
+system.toL2Bus.trans_dist::WritebackClean 1971000 # Transaction distribution
+system.toL2Bus.trans_dist::CleanEvict 146335 # Transaction distribution
+system.toL2Bus.trans_dist::UpgradeReq 2812 # Transaction distribution
+system.toL2Bus.trans_dist::SCUpgradeReq 29 # Transaction distribution
+system.toL2Bus.trans_dist::UpgradeResp 2841 # Transaction distribution
+system.toL2Bus.trans_dist::ReadExReq 296829 # Transaction distribution
+system.toL2Bus.trans_dist::ReadExResp 296829 # Transaction distribution
+system.toL2Bus.trans_dist::ReadCleanReq 1971549 # Transaction distribution
+system.toL2Bus.trans_dist::ReadSharedReq 537547 # Transaction distribution
+system.toL2Bus.trans_dist::InvalidateReq 4488 # Transaction distribution
+system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 5931996 # Packet count per connected master and slave (bytes)
+system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 2625304 # Packet count per connected master and slave (bytes)
+system.toL2Bus.pkt_count_system.cpu0.itb.walker.dma::system.l2c.cpu_side 25197 # Packet count per connected master and slave (bytes)
+system.toL2Bus.pkt_count_system.cpu0.dtb.walker.dma::system.l2c.cpu_side 99111 # Packet count per connected master and slave (bytes)
+system.toL2Bus.pkt_count::total 8681608 # Packet count per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 252349880 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 97897081 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu0.itb.walker.dma::system.l2c.cpu_side 40804 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size_system.cpu0.dtb.walker.dma::system.l2c.cpu_side 174056 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.pkt_size::total 350461821 # Cumulative packet size per connected master and slave (bytes)
+system.toL2Bus.snoops 123025 # Total snoops (count)
+system.toL2Bus.snoop_fanout::samples 4134634 # Request fanout histogram
+system.toL2Bus.snoop_fanout::mean 0.021870 # Request fanout histogram
+system.toL2Bus.snoop_fanout::stdev 0.146260 # Request fanout histogram
system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.toL2Bus.snoop_fanout::0 4113137 97.84% 97.84% # Request fanout histogram
-system.toL2Bus.snoop_fanout::1 90779 2.16% 100.00% # Request fanout histogram
+system.toL2Bus.snoop_fanout::0 4044208 97.81% 97.81% # Request fanout histogram
+system.toL2Bus.snoop_fanout::1 90426 2.19% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
system.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram
-system.toL2Bus.snoop_fanout::total 4203916 # Request fanout histogram
-system.toL2Bus.reqLayer0.occupancy 3441095952 # Layer occupancy (ticks)
+system.toL2Bus.snoop_fanout::total 4134634 # Request fanout histogram
+system.toL2Bus.reqLayer0.occupancy 3415021456 # Layer occupancy (ticks)
system.toL2Bus.reqLayer0.utilization 0.1 # Layer utilization (%)
-system.toL2Bus.snoopLayer0.occupancy 260919 # Layer occupancy (ticks)
+system.toL2Bus.snoopLayer0.occupancy 230913 # Layer occupancy (ticks)
system.toL2Bus.snoopLayer0.utilization 0.0 # Layer utilization (%)
-system.toL2Bus.respLayer0.occupancy 1872616750 # Layer occupancy (ticks)
+system.toL2Bus.respLayer0.occupancy 1843284752 # Layer occupancy (ticks)
system.toL2Bus.respLayer0.utilization 0.1 # Layer utilization (%)
-system.toL2Bus.respLayer1.occupancy 760133706 # Layer occupancy (ticks)
+system.toL2Bus.respLayer1.occupancy 768458163 # Layer occupancy (ticks)
system.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%)
-system.toL2Bus.respLayer2.occupancy 11021467 # Layer occupancy (ticks)
+system.toL2Bus.respLayer2.occupancy 10591473 # Layer occupancy (ticks)
system.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%)
-system.toL2Bus.respLayer3.occupancy 48273206 # Layer occupancy (ticks)
+system.toL2Bus.respLayer3.occupancy 47113721 # Layer occupancy (ticks)
system.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%)
system.cpu3.kern.inst.arm 0 # number of arm instructions executed
system.cpu3.kern.inst.quiesce 0 # number of quiesce instructions executed