diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/stats.txt')
| -rw-r--r-- | tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/stats.txt | 104 |
1 files changed, 56 insertions, 48 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/stats.txt index 202c4ef0d..3b6b744bc 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/stats.txt @@ -4,11 +4,11 @@ sim_seconds 47.554910 # Nu sim_ticks 47554910274000 # Number of ticks simulated final_tick 47554910274000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 172972 # Simulator instruction rate (inst/s) -host_op_rate 203472 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 9377554592 # Simulator tick rate (ticks/s) -host_mem_usage 769556 # Number of bytes of host memory used -host_seconds 5071.14 # Real time elapsed on the host +host_inst_rate 271941 # Simulator instruction rate (inst/s) +host_op_rate 319891 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 14743065549 # Simulator tick rate (ticks/s) +host_mem_usage 772792 # Number of bytes of host memory used +host_seconds 3225.58 # Real time elapsed on the host sim_insts 877166784 # Number of instructions simulated sim_ops 1031833041 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -625,34 +625,38 @@ system.cpu0.op_class_0::No_OpClass 1 0.00% 0.00% # Cl system.cpu0.op_class_0::IntAlu 368287155 69.25% 69.25% # Class of committed instruction system.cpu0.op_class_0::IntMult 1118982 0.21% 69.46% # Class of committed instruction system.cpu0.op_class_0::IntDiv 57276 0.01% 69.47% # Class of committed instruction -system.cpu0.op_class_0::FloatAdd 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::FloatCmp 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::FloatCvt 0 0.00% 69.47% # Class of committed instruction +system.cpu0.op_class_0::FloatAdd 8 0.00% 69.47% # Class of committed instruction +system.cpu0.op_class_0::FloatCmp 13 0.00% 69.47% # Class of committed instruction +system.cpu0.op_class_0::FloatCvt 21 0.00% 69.47% # Class of committed instruction system.cpu0.op_class_0::FloatMult 0 0.00% 69.47% # Class of committed instruction +system.cpu0.op_class_0::FloatMultAcc 0 0.00% 69.47% # Class of committed instruction system.cpu0.op_class_0::FloatDiv 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::FloatSqrt 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdAdd 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdAddAcc 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdAlu 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdCmp 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdCvt 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdMisc 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdMult 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdMultAcc 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdShift 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdShiftAcc 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdSqrt 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdFloatAdd 8 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdFloatAlu 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdFloatCmp 13 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdFloatCvt 21 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdFloatDiv 0 0.00% 69.47% # Class of committed instruction -system.cpu0.op_class_0::SimdFloatMisc 85306 0.02% 69.48% # Class of committed instruction +system.cpu0.op_class_0::FloatMisc 85306 0.02% 69.48% # Class of committed instruction +system.cpu0.op_class_0::FloatSqrt 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdAdd 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdAddAcc 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdAlu 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdCmp 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdCvt 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdMisc 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdMult 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdMultAcc 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdShift 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdShiftAcc 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdSqrt 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdFloatAdd 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdFloatAlu 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdFloatCmp 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdFloatCvt 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdFloatDiv 0 0.00% 69.48% # Class of committed instruction +system.cpu0.op_class_0::SimdFloatMisc 0 0.00% 69.48% # Class of committed instruction system.cpu0.op_class_0::SimdFloatMult 0 0.00% 69.48% # Class of committed instruction system.cpu0.op_class_0::SimdFloatMultAcc 0 0.00% 69.48% # Class of committed instruction system.cpu0.op_class_0::SimdFloatSqrt 0 0.00% 69.48% # Class of committed instruction -system.cpu0.op_class_0::MemRead 84402084 15.87% 85.35% # Class of committed instruction -system.cpu0.op_class_0::MemWrite 77900254 14.65% 100.00% # Class of committed instruction +system.cpu0.op_class_0::MemRead 84333617 15.86% 85.34% # Class of committed instruction +system.cpu0.op_class_0::MemWrite 77481840 14.57% 99.91% # Class of committed instruction +system.cpu0.op_class_0::FloatMemRead 68467 0.01% 99.92% # Class of committed instruction +system.cpu0.op_class_0::FloatMemWrite 418414 0.08% 100.00% # Class of committed instruction system.cpu0.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction system.cpu0.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu0.op_class_0::total 531851100 # Class of committed instruction @@ -1639,30 +1643,34 @@ system.cpu1.op_class_0::FloatAdd 0 0.00% 69.45% # Cl system.cpu1.op_class_0::FloatCmp 0 0.00% 69.45% # Class of committed instruction system.cpu1.op_class_0::FloatCvt 0 0.00% 69.45% # Class of committed instruction system.cpu1.op_class_0::FloatMult 0 0.00% 69.45% # Class of committed instruction +system.cpu1.op_class_0::FloatMultAcc 0 0.00% 69.45% # Class of committed instruction system.cpu1.op_class_0::FloatDiv 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::FloatSqrt 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdAdd 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdAddAcc 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdAlu 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdCmp 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdCvt 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdMisc 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdMult 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdMultAcc 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdShift 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdShiftAcc 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdSqrt 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdFloatAdd 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdFloatAlu 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdFloatCmp 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdFloatCvt 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdFloatDiv 0 0.00% 69.45% # Class of committed instruction -system.cpu1.op_class_0::SimdFloatMisc 26657 0.01% 69.46% # Class of committed instruction +system.cpu1.op_class_0::FloatMisc 26657 0.01% 69.46% # Class of committed instruction +system.cpu1.op_class_0::FloatSqrt 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdAdd 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdAddAcc 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdAlu 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdCmp 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdCvt 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdMisc 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdMult 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdMultAcc 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdShift 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdShiftAcc 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdSqrt 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdFloatAdd 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdFloatAlu 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdFloatCmp 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdFloatCvt 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdFloatDiv 0 0.00% 69.46% # Class of committed instruction +system.cpu1.op_class_0::SimdFloatMisc 0 0.00% 69.46% # Class of committed instruction system.cpu1.op_class_0::SimdFloatMult 0 0.00% 69.46% # Class of committed instruction system.cpu1.op_class_0::SimdFloatMultAcc 0 0.00% 69.46% # Class of committed instruction system.cpu1.op_class_0::SimdFloatSqrt 0 0.00% 69.46% # Class of committed instruction -system.cpu1.op_class_0::MemRead 80579122 16.12% 85.58% # Class of committed instruction -system.cpu1.op_class_0::MemWrite 72116197 14.42% 100.00% # Class of committed instruction +system.cpu1.op_class_0::MemRead 80537576 16.11% 85.57% # Class of committed instruction +system.cpu1.op_class_0::MemWrite 71850356 14.37% 99.94% # Class of committed instruction +system.cpu1.op_class_0::FloatMemRead 41546 0.01% 99.95% # Class of committed instruction +system.cpu1.op_class_0::FloatMemWrite 265841 0.05% 100.00% # Class of committed instruction system.cpu1.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction system.cpu1.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu1.op_class_0::total 499981941 # Class of committed instruction |