diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt')
| -rw-r--r-- | tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt | 32 |
1 files changed, 18 insertions, 14 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt index 1319d3c2e..5d6718d90 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt @@ -4,11 +4,11 @@ sim_seconds 51.688775 # Nu sim_ticks 51688774990000 # Number of ticks simulated final_tick 51688774990000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 210815 # Simulator instruction rate (inst/s) -host_op_rate 247704 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 11507504763 # Simulator tick rate (ticks/s) -host_mem_usage 684036 # Number of bytes of host memory used -host_seconds 4491.74 # Real time elapsed on the host +host_inst_rate 278192 # Simulator instruction rate (inst/s) +host_op_rate 326870 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 15185295340 # Simulator tick rate (ticks/s) +host_mem_usage 686764 # Number of bytes of host memory used +host_seconds 3403.87 # Real time elapsed on the host sim_insts 946928269 # Number of instructions simulated sim_ops 1112623169 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -588,11 +588,13 @@ system.cpu.op_class_0::No_OpClass 1 0.00% 0.00% # Cl system.cpu.op_class_0::IntAlu 771151081 69.31% 69.31% # Class of committed instruction system.cpu.op_class_0::IntMult 2302642 0.21% 69.52% # Class of committed instruction system.cpu.op_class_0::IntDiv 99189 0.01% 69.53% # Class of committed instruction -system.cpu.op_class_0::FloatAdd 0 0.00% 69.53% # Class of committed instruction -system.cpu.op_class_0::FloatCmp 0 0.00% 69.53% # Class of committed instruction -system.cpu.op_class_0::FloatCvt 0 0.00% 69.53% # Class of committed instruction +system.cpu.op_class_0::FloatAdd 8 0.00% 69.53% # Class of committed instruction +system.cpu.op_class_0::FloatCmp 13 0.00% 69.53% # Class of committed instruction +system.cpu.op_class_0::FloatCvt 21 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::FloatMult 0 0.00% 69.53% # Class of committed instruction +system.cpu.op_class_0::FloatMultAcc 0 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::FloatDiv 0 0.00% 69.53% # Class of committed instruction +system.cpu.op_class_0::FloatMisc 108989 0.01% 69.53% # Class of committed instruction system.cpu.op_class_0::FloatSqrt 0 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::SimdAdd 0 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::SimdAddAcc 0 0.00% 69.53% # Class of committed instruction @@ -605,17 +607,19 @@ system.cpu.op_class_0::SimdMultAcc 0 0.00% 69.53% # Cl system.cpu.op_class_0::SimdShift 0 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::SimdShiftAcc 0 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::SimdSqrt 0 0.00% 69.53% # Class of committed instruction -system.cpu.op_class_0::SimdFloatAdd 8 0.00% 69.53% # Class of committed instruction +system.cpu.op_class_0::SimdFloatAdd 0 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::SimdFloatAlu 0 0.00% 69.53% # Class of committed instruction -system.cpu.op_class_0::SimdFloatCmp 13 0.00% 69.53% # Class of committed instruction -system.cpu.op_class_0::SimdFloatCvt 21 0.00% 69.53% # Class of committed instruction +system.cpu.op_class_0::SimdFloatCmp 0 0.00% 69.53% # Class of committed instruction +system.cpu.op_class_0::SimdFloatCvt 0 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::SimdFloatDiv 0 0.00% 69.53% # Class of committed instruction -system.cpu.op_class_0::SimdFloatMisc 108989 0.01% 69.53% # Class of committed instruction +system.cpu.op_class_0::SimdFloatMisc 0 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::SimdFloatMult 0 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::SimdFloatMultAcc 0 0.00% 69.53% # Class of committed instruction system.cpu.op_class_0::SimdFloatSqrt 0 0.00% 69.53% # Class of committed instruction -system.cpu.op_class_0::MemRead 177312606 15.94% 85.47% # Class of committed instruction -system.cpu.op_class_0::MemWrite 161648619 14.53% 100.00% # Class of committed instruction +system.cpu.op_class_0::MemRead 177200146 15.93% 85.46% # Class of committed instruction +system.cpu.op_class_0::MemWrite 160983743 14.47% 99.93% # Class of committed instruction +system.cpu.op_class_0::FloatMemRead 112460 0.01% 99.94% # Class of committed instruction +system.cpu.op_class_0::FloatMemWrite 664876 0.06% 100.00% # Class of committed instruction system.cpu.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::total 1112623169 # Class of committed instruction |